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Serial port test throughput issue

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  • Serial port test throughput issue

    Dear Sir:
    I am a FAE of our product, LPC to 4 comport bridge IC. Recently, in our customer's environment, something strange happened.
    CPU/chipset : ATOM 945GSE + ICH7M
    SIO : winbond W83627HG + Fintek F81216 x 4, total 18 com ports(16 with external connector, 2 with onboard pins)
    Symptom :
    Each Speed does not match with each other (Odd ports make larger throughput than even ones, and can reach 50%~60% difference)

    After removing all com ports, then add com ports gradually, like COM1~COM6 first, then COM7~COM12, then COM13~COM16, the test result will be much better

    Here are my questions:
    1. Since there is no error, is there anyway to convince our customer that the test result is ok? Or do you have a method to adjust all com ports' throuthput to the same?
    2. Is there any adjustment we can do to make the test have the same good result as removing-adding com ports?
    Thanks for your patience~

  • #2
    I would think this is a result of the CPU Interrupt configuration on the system, IRL levels. If the CPU is receiving alot of serial port Interrupts to copy data from the Serial port buffer to Memory then these will be handled in the order as dictated by the IRQ levels of the serial ports. When the CPU interrupt load is high, the COM ports with higher IRL levels can have higher throughput.

    I would check your IRQ levels for the serial ports to verify this.


    • #3
      In the beginning, customer show me this pic:

      which IRQ is as below:
      COM1 : IRQ4
      COM2 : IRQ3
      COM3-6 : IRQ10
      COM7-10 : IRQ11
      COM11-14 : IRQ5
      COM15-18 : IRQ10

      Since the result has odd/even distribution, so I finetune the IRQ as below:
      COM1/2 : no change
      COM3/5/7/9/11/13/15/17 : IRQ11
      COM4/6/8/10/12/14/16/18 : IRQ10
      and the result is as described above post.

      COM1/2 is legacy IRQ, which means active high/edge trigger
      COM3-18's IRQ is active low / level trigger


      • #4
        For me this is not an error situation.

        There is competition for the resources of the CPU, and the CPU is a slow one, so some hardware devices are given preference. This is a normal result of the IRQ levels.

        You might be able to even it out a bit by using less serial ports, using a faster CPU, running the serial ports at a lower speed, or playing around with the serial port FIFO buffers.


        • #5
          Once the CPU gets the interrupt, it will know who sent the interrupt since there is a dedicated interrupt wire for each serial port (unless interrupts are shared).