2025-06-18 16:48:43 - Attempting to retrieve the root directory of the data partition. 2025-06-18 16:48:43 - Found 3 handles that supported SimpleFileSystem 2025-06-18 16:48:43 - Checking handle 0 (3CE46798) 2025-06-18 16:48:43 - Handle is own partition 2025-06-18 16:48:43 - Checking handle 1 (3CE45698) 2025-06-18 16:48:43 - HD node found: MBR type(2), Signature type(2), Part #(2), Start LBA(524288), Num Sectors(524288) 2025-06-18 16:48:43 - Self node: MBR type(2), Signature type(2), Part #(1), Start LBA(2048), Num Sectors(522240) 2025-06-18 16:48:44 - Checking handle 2 (3CCC0E18) 2025-06-18 16:48:44 - Found 9 handles that supported Block I/O protocol 2025-06-18 16:48:44 - HD node found: MBR type(2), Signature type(2), Signature(50415353-CE04-4F8F-AC32-6F3693F43704), Part #(1), Start LBA(2048), Num Sectors(522240) 2025-06-18 16:48:44 - HD node found: MBR type(2), Signature type(2), Signature(50415353-6343-46C0-B68C-69EE6326F32B), Part #(2), Start LBA(524288), Num Sectors(524288) 2025-06-18 16:48:44 - HD node found: MBR type(2), Signature type(2), Signature(50415353-2A40-4503-B2F7-474E00EBFBAA), Part #(3), Start LBA(1048576), Num Sectors(1048543) 2025-06-18 16:48:44 - Found DMA Test Partition 2025-06-18 16:48:44 - Successfully obtained Block I/O protocol 2025-06-18 16:48:44 - Successfully obtained Partition Info protocol 2025-06-18 16:48:44 - Revision: 0x1000 2025-06-18 16:48:44 - Type: 0x2 2025-06-18 16:48:44 - System: 0x0 2025-06-18 16:48:44 - GPT - PartitionTypeGUID: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 2025-06-18 16:48:44 - GPT - UniquePartitionGUID: 50415353-2A40-4503-B2F7-474E00EBFBAA 2025-06-18 16:48:44 - GPT - StartingLBA: 0x100000 2025-06-18 16:48:44 - GPT - EndingLBA: 0x1FFFDE 2025-06-18 16:48:44 - GPT - Attributes: 0x0 2025-06-18 16:48:45 - GPT - PartitionName: DMA Test Partition 2025-06-18 16:48:45 - Media ID: 0x00000000 2025-06-18 16:48:45 - Removable: yes 2025-06-18 16:48:45 - Media Present: yes 2025-06-18 16:48:45 - Logical Part: yes 2025-06-18 16:48:45 - Read-only: no 2025-06-18 16:48:45 - Write cache: no 2025-06-18 16:48:45 - Block size: 512 2025-06-18 16:48:45 - Align: 0 2025-06-18 16:48:45 - Last block: 0xFFFDE 2025-06-18 16:48:45 - Lowest LBA: 0x0 2025-06-18 16:48:45 - Log blks per phys blk: 0 2025-06-18 16:48:45 - Optimal transfer len: 0 2025-06-18 16:48:45 - [FS0] 2025-06-18 16:48:45 - PciRoot(0x0)/Pci(0x14,0x0)/USB(0x4,0x0)/HD(1,GPT,50415353-CE04-4F8F-AC32-6F3693F43704,0x800,0x7F800) 2025-06-18 16:48:45 - File system info buffer size: 38 2025-06-18 16:48:45 - Label: "", Mode: RW, Free space: 245 MB / 254 MB (0%) 2025-06-18 16:48:46 - [FS1] 2025-06-18 16:48:46 - PciRoot(0x0)/Pci(0x14,0x0)/USB(0x4,0x0)/HD(2,GPT,50415353-6343-46C0-B68C-69EE6326F32B,0x80000,0x80000) 2025-06-18 16:48:46 - File system info buffer size: 38 2025-06-18 16:48:46 - Label: "", Mode: RW, Free space: 246 MB / 255 MB (0%) 2025-06-18 16:48:46 - [FS2] 2025-06-18 16:48:46 - PciRoot(0x0)/Pci(0x1,0x1)/Pci(0x0,0x0)/NVMe(0x1,4B-1B-20-6A-8A-A7-79-64)/HD(1,GPT,17B912F0-E4B4-4D68-A070-E5841DCFAEAB,0x800,0x32000) 2025-06-18 16:48:46 - File system info buffer size: 38 2025-06-18 16:48:46 - Label: "", Mode: RW, Free space: 62 MB / 96 MB (0%) 2025-06-18 16:48:46 - Disabling watchdog timer (Result: Success) 2025-06-18 16:48:46 - Could not find Simple Network protocol from image device handle 2025-06-18 16:48:46 - Found 10 handles that supported Simple Network 2025-06-18 16:48:46 - Handle 0 - 3CCBDA98 2025-06-18 16:48:46 - [0] State: 2 2025-06-18 16:48:46 - [0] HW addr size: 6 2025-06-18 16:48:46 - [0] CurrentAddress: CC:82:7F:4B:32:D7 2025-06-18 16:48:46 - [0] PermanentAddress: CC:82:7F:4B:32:D7 2025-06-18 16:48:46 - [0] IfType: 1 2025-06-18 16:48:46 - [0] MacAddressChangeable: 1 2025-06-18 16:48:47 - [0] MediaPresentSupported: 1 2025-06-18 16:48:47 - [0] MediaPresent: 0 2025-06-18 16:48:47 - Found first handle supporting Simple Network protocol 2025-06-18 16:48:47 - HW addr size: 6 2025-06-18 16:48:47 - CurrentAddress: CC:82:7F:4B:32:D7 2025-06-18 16:48:47 - PermanentAddress: CC:82:7F:4B:32:D7 2025-06-18 16:48:47 - {0} B625B186-E063-44F7-8905-6A74DC6F52B4 2025-06-18 16:48:47 - {1} 7F1647C8-B76E-44B2-A565-F70FF19CD19E 2025-06-18 16:48:47 - {2} D9760FF3-3CCA-4267-80F9-7527FAFA4223 2025-06-18 16:48:47 - {3} 9FB9A8A1-2F4A-43A6-889C-D0F7B6C47AD5 2025-06-18 16:48:47 - {4} 66ED4721-3C98-4D3E-81E3-D03DD39A7254 2025-06-18 16:48:47 - {5} EC20EB79-6C1A-4664-9A0D-D2E4CC16D664 2025-06-18 16:48:47 - {6} 937FE521-95AE-4D1A-8929-48BCD90AD31A 2025-06-18 16:48:47 - {7} EC835DD3-FE0F-617B-A621-B350C3E13388 2025-06-18 16:48:47 - {8} B95E9FDA-26DE-48D2-8807-1F9107AC5E3A 2025-06-18 16:48:48 - {9} 2FE800BE-8F01-4AA6-946B-D71388E1833F 2025-06-18 16:48:48 - {10} 9D9A39D8-BD42-4A73-A4D5-8EE94BE11380 2025-06-18 16:48:48 - {11} 83F01464-99BD-45E5-B383-AF6305D8E9E6 2025-06-18 16:48:48 - {12} BDC8E6AF-D9BC-4379-A72A-E0C4E75DAE1C 2025-06-18 16:48:48 - {13} 00720665-67EB-4A99-BAF7-D3C33A1C7CC9 2025-06-18 16:48:48 - {14} 5B446ED1-E30B-4FAA-871A-3654ECA36080 2025-06-18 16:48:48 - {15} C51711E7-B4BF-404A-BFB8-0A048EF1FFE4 2025-06-18 16:48:48 - {16} F44C00EE-1F2C-4A00-AA09-1C9F3E0800A3 2025-06-18 16:48:48 - {17} F36FF770-A7E1-42CF-9ED2-56F0F271F44C 2025-06-18 16:48:48 - {18} 9E23D768-D2F3-4366-9FC3-3A7ABA864374 2025-06-18 16:48:48 - {19} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:48 - {20} 330D4706-F2A0-4E4F-A369-B66FA8D54385 2025-06-18 16:48:48 - {21} E5DD1403-D622-C24E-8488-C71B17F5E802 2025-06-18 16:48:48 - {22} 86C77A67-0B97-4633-A187-49104D0685C7 2025-06-18 16:48:48 - {23} 34D59603-1428-4429-A414-E6B3B5FD7DC1 2025-06-18 16:48:48 - {24} 0E1AD94A-DCF4-11DB-9705-00E08161165F 2025-06-18 16:48:48 - {25} 1ACED566-76ED-4218-BC81-767F1F977A89 2025-06-18 16:48:48 - {26} E3161450-AD0F-11D9-9669-0800200C9A66 2025-06-18 16:48:48 - {27} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:48 - {28} 51DD8B21-AD8D-48E9-BC3F-24F46722C748 2025-06-18 16:48:48 - Handle 1 - 37D8FA98 2025-06-18 16:48:48 - [1] State: 2 2025-06-18 16:48:49 - [1] HW addr size: 6 2025-06-18 16:48:49 - [1] CurrentAddress: CC:82:7F:4B:32:D7 2025-06-18 16:48:49 - [1] PermanentAddress: CC:82:7F:4B:32:D7 2025-06-18 16:48:49 - [1] IfType: 1 2025-06-18 16:48:49 - [1] MacAddressChangeable: 1 2025-06-18 16:48:49 - [1] MediaPresentSupported: 1 2025-06-18 16:48:49 - [1] MediaPresent: 0 2025-06-18 16:48:49 - {0} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:49 - {1} 03C4E603-AC28-11D3-9A2D-0090273FC14D 2025-06-18 16:48:49 - {2} 56EC3091-954C-11D2-8E3F-00A0C969723B 2025-06-18 16:48:49 - {3} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:49 - Handle 2 - 37D78298 2025-06-18 16:48:49 - [2] State: 2 2025-06-18 16:48:49 - [2] HW addr size: 6 2025-06-18 16:48:50 - [2] CurrentAddress: CC:82:7F:4B:32:D8 2025-06-18 16:48:50 - [2] PermanentAddress: CC:82:7F:4B:32:D8 2025-06-18 16:48:50 - [2] IfType: 1 2025-06-18 16:48:50 - [2] MacAddressChangeable: 1 2025-06-18 16:48:50 - [2] MediaPresentSupported: 1 2025-06-18 16:48:50 - [2] MediaPresent: 0 2025-06-18 16:48:50 - {0} B625B186-E063-44F7-8905-6A74DC6F52B4 2025-06-18 16:48:50 - {1} 7F1647C8-B76E-44B2-A565-F70FF19CD19E 2025-06-18 16:48:50 - {2} D9760FF3-3CCA-4267-80F9-7527FAFA4223 2025-06-18 16:48:50 - {3} 9FB9A8A1-2F4A-43A6-889C-D0F7B6C47AD5 2025-06-18 16:48:50 - {4} 66ED4721-3C98-4D3E-81E3-D03DD39A7254 2025-06-18 16:48:50 - {5} EC20EB79-6C1A-4664-9A0D-D2E4CC16D664 2025-06-18 16:48:50 - {6} 937FE521-95AE-4D1A-8929-48BCD90AD31A 2025-06-18 16:48:50 - {7} EC835DD3-FE0F-617B-A621-B350C3E13388 2025-06-18 16:48:50 - {8} B95E9FDA-26DE-48D2-8807-1F9107AC5E3A 2025-06-18 16:48:50 - {9} 2FE800BE-8F01-4AA6-946B-D71388E1833F 2025-06-18 16:48:50 - {10} 9D9A39D8-BD42-4A73-A4D5-8EE94BE11380 2025-06-18 16:48:50 - {11} 83F01464-99BD-45E5-B383-AF6305D8E9E6 2025-06-18 16:48:50 - {12} BDC8E6AF-D9BC-4379-A72A-E0C4E75DAE1C 2025-06-18 16:48:50 - {13} 00720665-67EB-4A99-BAF7-D3C33A1C7CC9 2025-06-18 16:48:50 - {14} 5B446ED1-E30B-4FAA-871A-3654ECA36080 2025-06-18 16:48:50 - {15} C51711E7-B4BF-404A-BFB8-0A048EF1FFE4 2025-06-18 16:48:51 - {16} F44C00EE-1F2C-4A00-AA09-1C9F3E0800A3 2025-06-18 16:48:51 - {17} F36FF770-A7E1-42CF-9ED2-56F0F271F44C 2025-06-18 16:48:51 - {18} 9E23D768-D2F3-4366-9FC3-3A7ABA864374 2025-06-18 16:48:51 - {19} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:51 - {20} 330D4706-F2A0-4E4F-A369-B66FA8D54385 2025-06-18 16:48:51 - {21} E5DD1403-D622-C24E-8488-C71B17F5E802 2025-06-18 16:48:51 - {22} 86C77A67-0B97-4633-A187-49104D0685C7 2025-06-18 16:48:51 - {23} 34D59603-1428-4429-A414-E6B3B5FD7DC1 2025-06-18 16:48:51 - {24} 0E1AD94A-DCF4-11DB-9705-00E08161165F 2025-06-18 16:48:51 - {25} 1ACED566-76ED-4218-BC81-767F1F977A89 2025-06-18 16:48:51 - {26} E3161450-AD0F-11D9-9669-0800200C9A66 2025-06-18 16:48:51 - {27} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:52 - {28} 51DD8B21-AD8D-48E9-BC3F-24F46722C748 2025-06-18 16:48:52 - Handle 3 - 37C03F98 2025-06-18 16:48:52 - [3] State: 2 2025-06-18 16:48:52 - [3] HW addr size: 6 2025-06-18 16:48:52 - [3] CurrentAddress: CC:82:7F:4B:32:D8 2025-06-18 16:48:52 - [3] PermanentAddress: CC:82:7F:4B:32:D8 2025-06-18 16:48:52 - [3] IfType: 1 2025-06-18 16:48:52 - [3] MacAddressChangeable: 1 2025-06-18 16:48:52 - [3] MediaPresentSupported: 1 2025-06-18 16:48:52 - [3] MediaPresent: 0 2025-06-18 16:48:52 - {0} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:52 - {1} 03C4E603-AC28-11D3-9A2D-0090273FC14D 2025-06-18 16:48:52 - {2} 56EC3091-954C-11D2-8E3F-00A0C969723B 2025-06-18 16:48:52 - {3} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:52 - Handle 4 - 37BEF398 2025-06-18 16:48:52 - [4] State: 2 2025-06-18 16:48:52 - [4] HW addr size: 6 2025-06-18 16:48:52 - [4] CurrentAddress: CC:82:7F:4B:32:D9 2025-06-18 16:48:52 - [4] PermanentAddress: CC:82:7F:4B:32:D9 2025-06-18 16:48:52 - [4] IfType: 1 2025-06-18 16:48:52 - [4] MacAddressChangeable: 1 2025-06-18 16:48:52 - [4] MediaPresentSupported: 1 2025-06-18 16:48:52 - [4] MediaPresent: 0 2025-06-18 16:48:52 - {0} B625B186-E063-44F7-8905-6A74DC6F52B4 2025-06-18 16:48:52 - {1} 7F1647C8-B76E-44B2-A565-F70FF19CD19E 2025-06-18 16:48:52 - {2} D9760FF3-3CCA-4267-80F9-7527FAFA4223 2025-06-18 16:48:53 - {3} 9FB9A8A1-2F4A-43A6-889C-D0F7B6C47AD5 2025-06-18 16:48:53 - {4} 66ED4721-3C98-4D3E-81E3-D03DD39A7254 2025-06-18 16:48:53 - {5} EC20EB79-6C1A-4664-9A0D-D2E4CC16D664 2025-06-18 16:48:53 - {6} 937FE521-95AE-4D1A-8929-48BCD90AD31A 2025-06-18 16:48:53 - {7} EC835DD3-FE0F-617B-A621-B350C3E13388 2025-06-18 16:48:53 - {8} B95E9FDA-26DE-48D2-8807-1F9107AC5E3A 2025-06-18 16:48:53 - {9} 2FE800BE-8F01-4AA6-946B-D71388E1833F 2025-06-18 16:48:53 - {10} 9D9A39D8-BD42-4A73-A4D5-8EE94BE11380 2025-06-18 16:48:53 - {11} 83F01464-99BD-45E5-B383-AF6305D8E9E6 2025-06-18 16:48:54 - {12} BDC8E6AF-D9BC-4379-A72A-E0C4E75DAE1C 2025-06-18 16:48:54 - {13} 00720665-67EB-4A99-BAF7-D3C33A1C7CC9 2025-06-18 16:48:54 - {14} 5B446ED1-E30B-4FAA-871A-3654ECA36080 2025-06-18 16:48:54 - {15} C51711E7-B4BF-404A-BFB8-0A048EF1FFE4 2025-06-18 16:48:54 - {16} F44C00EE-1F2C-4A00-AA09-1C9F3E0800A3 2025-06-18 16:48:54 - {17} F36FF770-A7E1-42CF-9ED2-56F0F271F44C 2025-06-18 16:48:54 - {18} 9E23D768-D2F3-4366-9FC3-3A7ABA864374 2025-06-18 16:48:54 - {19} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:54 - {20} 330D4706-F2A0-4E4F-A369-B66FA8D54385 2025-06-18 16:48:54 - {21} E5DD1403-D622-C24E-8488-C71B17F5E802 2025-06-18 16:48:54 - {22} 86C77A67-0B97-4633-A187-49104D0685C7 2025-06-18 16:48:54 - {23} 34D59603-1428-4429-A414-E6B3B5FD7DC1 2025-06-18 16:48:54 - {24} 0E1AD94A-DCF4-11DB-9705-00E08161165F 2025-06-18 16:48:54 - {25} 1ACED566-76ED-4218-BC81-767F1F977A89 2025-06-18 16:48:54 - {26} E3161450-AD0F-11D9-9669-0800200C9A66 2025-06-18 16:48:54 - {27} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:54 - {28} 51DD8B21-AD8D-48E9-BC3F-24F46722C748 2025-06-18 16:48:54 - Handle 5 - 37A7CC98 2025-06-18 16:48:54 - [5] State: 2 2025-06-18 16:48:54 - [5] HW addr size: 6 2025-06-18 16:48:54 - [5] CurrentAddress: CC:82:7F:4B:32:D9 2025-06-18 16:48:54 - [5] PermanentAddress: CC:82:7F:4B:32:D9 2025-06-18 16:48:54 - [5] IfType: 1 2025-06-18 16:48:54 - [5] MacAddressChangeable: 1 2025-06-18 16:48:54 - [5] MediaPresentSupported: 1 2025-06-18 16:48:54 - [5] MediaPresent: 0 2025-06-18 16:48:54 - {0} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:54 - {1} 03C4E603-AC28-11D3-9A2D-0090273FC14D 2025-06-18 16:48:55 - {2} 56EC3091-954C-11D2-8E3F-00A0C969723B 2025-06-18 16:48:55 - {3} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:55 - Handle 6 - 37A68418 2025-06-18 16:48:55 - [6] State: 2 2025-06-18 16:48:55 - [6] HW addr size: 6 2025-06-18 16:48:55 - [6] CurrentAddress: CC:82:7F:4B:32:DA 2025-06-18 16:48:55 - [6] PermanentAddress: CC:82:7F:4B:32:DA 2025-06-18 16:48:56 - [6] IfType: 1 2025-06-18 16:48:56 - [6] MacAddressChangeable: 1 2025-06-18 16:48:56 - [6] MediaPresentSupported: 1 2025-06-18 16:48:56 - [6] MediaPresent: 0 2025-06-18 16:48:56 - {0} B625B186-E063-44F7-8905-6A74DC6F52B4 2025-06-18 16:48:56 - {1} 7F1647C8-B76E-44B2-A565-F70FF19CD19E 2025-06-18 16:48:56 - {2} D9760FF3-3CCA-4267-80F9-7527FAFA4223 2025-06-18 16:48:56 - {3} 9FB9A8A1-2F4A-43A6-889C-D0F7B6C47AD5 2025-06-18 16:48:56 - {4} 66ED4721-3C98-4D3E-81E3-D03DD39A7254 2025-06-18 16:48:56 - {5} EC20EB79-6C1A-4664-9A0D-D2E4CC16D664 2025-06-18 16:48:56 - {6} 937FE521-95AE-4D1A-8929-48BCD90AD31A 2025-06-18 16:48:56 - {7} EC835DD3-FE0F-617B-A621-B350C3E13388 2025-06-18 16:48:56 - {8} B95E9FDA-26DE-48D2-8807-1F9107AC5E3A 2025-06-18 16:48:56 - {9} 2FE800BE-8F01-4AA6-946B-D71388E1833F 2025-06-18 16:48:56 - {10} 9D9A39D8-BD42-4A73-A4D5-8EE94BE11380 2025-06-18 16:48:56 - {11} 83F01464-99BD-45E5-B383-AF6305D8E9E6 2025-06-18 16:48:56 - {12} BDC8E6AF-D9BC-4379-A72A-E0C4E75DAE1C 2025-06-18 16:48:56 - {13} 00720665-67EB-4A99-BAF7-D3C33A1C7CC9 2025-06-18 16:48:56 - {14} 5B446ED1-E30B-4FAA-871A-3654ECA36080 2025-06-18 16:48:56 - {15} C51711E7-B4BF-404A-BFB8-0A048EF1FFE4 2025-06-18 16:48:56 - {16} F44C00EE-1F2C-4A00-AA09-1C9F3E0800A3 2025-06-18 16:48:56 - {17} F36FF770-A7E1-42CF-9ED2-56F0F271F44C 2025-06-18 16:48:56 - {18} 9E23D768-D2F3-4366-9FC3-3A7ABA864374 2025-06-18 16:48:56 - {19} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:56 - {20} 330D4706-F2A0-4E4F-A369-B66FA8D54385 2025-06-18 16:48:56 - {21} E5DD1403-D622-C24E-8488-C71B17F5E802 2025-06-18 16:48:56 - {22} 86C77A67-0B97-4633-A187-49104D0685C7 2025-06-18 16:48:56 - {23} 34D59603-1428-4429-A414-E6B3B5FD7DC1 2025-06-18 16:48:56 - {24} 0E1AD94A-DCF4-11DB-9705-00E08161165F 2025-06-18 16:48:56 - {25} 1ACED566-76ED-4218-BC81-767F1F977A89 2025-06-18 16:48:56 - {26} E3161450-AD0F-11D9-9669-0800200C9A66 2025-06-18 16:48:57 - {27} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:57 - {28} 51DD8B21-AD8D-48E9-BC3F-24F46722C748 2025-06-18 16:48:57 - Handle 7 - 378F5518 2025-06-18 16:48:57 - [7] State: 2 2025-06-18 16:48:57 - [7] HW addr size: 6 2025-06-18 16:48:57 - [7] CurrentAddress: CC:82:7F:4B:32:DA 2025-06-18 16:48:57 - [7] PermanentAddress: CC:82:7F:4B:32:DA 2025-06-18 16:48:58 - [7] IfType: 1 2025-06-18 16:48:58 - [7] MacAddressChangeable: 1 2025-06-18 16:48:58 - [7] MediaPresentSupported: 1 2025-06-18 16:48:58 - [7] MediaPresent: 0 2025-06-18 16:48:58 - {0} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:58 - {1} 03C4E603-AC28-11D3-9A2D-0090273FC14D 2025-06-18 16:48:58 - {2} 56EC3091-954C-11D2-8E3F-00A0C969723B 2025-06-18 16:48:58 - {3} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:48:58 - Handle 8 - 378D0E18 2025-06-18 16:48:58 - [8] State: 2 2025-06-18 16:48:58 - [8] HW addr size: 6 2025-06-18 16:48:58 - [8] CurrentAddress: CC:82:7F:54:C3:06 2025-06-18 16:48:58 - [8] PermanentAddress: CC:82:7F:54:C3:06 2025-06-18 16:48:58 - [8] IfType: 1 2025-06-18 16:48:58 - [8] MacAddressChangeable: 1 2025-06-18 16:48:58 - [8] MediaPresentSupported: 1 2025-06-18 16:48:58 - [8] MediaPresent: 1 2025-06-18 16:48:58 - {0} B625B186-E063-44F7-8905-6A74DC6F52B4 2025-06-18 16:48:58 - {1} 7F1647C8-B76E-44B2-A565-F70FF19CD19E 2025-06-18 16:48:58 - {2} D9760FF3-3CCA-4267-80F9-7527FAFA4223 2025-06-18 16:48:58 - {3} 9FB9A8A1-2F4A-43A6-889C-D0F7B6C47AD5 2025-06-18 16:48:58 - {4} 66ED4721-3C98-4D3E-81E3-D03DD39A7254 2025-06-18 16:48:58 - {5} EC20EB79-6C1A-4664-9A0D-D2E4CC16D664 2025-06-18 16:48:58 - {6} 937FE521-95AE-4D1A-8929-48BCD90AD31A 2025-06-18 16:48:58 - {7} EC835DD3-FE0F-617B-A621-B350C3E13388 2025-06-18 16:48:58 - {8} B95E9FDA-26DE-48D2-8807-1F9107AC5E3A 2025-06-18 16:48:58 - {9} 2FE800BE-8F01-4AA6-946B-D71388E1833F 2025-06-18 16:48:58 - {10} 9D9A39D8-BD42-4A73-A4D5-8EE94BE11380 2025-06-18 16:48:58 - {11} 83F01464-99BD-45E5-B383-AF6305D8E9E6 2025-06-18 16:48:59 - {12} BDC8E6AF-D9BC-4379-A72A-E0C4E75DAE1C 2025-06-18 16:48:59 - {13} 00720665-67EB-4A99-BAF7-D3C33A1C7CC9 2025-06-18 16:48:59 - {14} 5B446ED1-E30B-4FAA-871A-3654ECA36080 2025-06-18 16:48:59 - {15} C51711E7-B4BF-404A-BFB8-0A048EF1FFE4 2025-06-18 16:48:59 - {16} F44C00EE-1F2C-4A00-AA09-1C9F3E0800A3 2025-06-18 16:48:59 - {17} F36FF770-A7E1-42CF-9ED2-56F0F271F44C 2025-06-18 16:48:59 - {18} 9E23D768-D2F3-4366-9FC3-3A7ABA864374 2025-06-18 16:48:59 - {19} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:48:59 - {20} 330D4706-F2A0-4E4F-A369-B66FA8D54385 2025-06-18 16:49:00 - {21} E5DD1403-D622-C24E-8488-C71B17F5E802 2025-06-18 16:49:00 - {22} 34D59603-1428-4429-A414-E6B3B5FD7DC1 2025-06-18 16:49:00 - {23} 0E1AD94A-DCF4-11DB-9705-00E08161165F 2025-06-18 16:49:00 - {24} 1ACED566-76ED-4218-BC81-767F1F977A89 2025-06-18 16:49:00 - {25} E3161450-AD0F-11D9-9669-0800200C9A66 2025-06-18 16:49:00 - {26} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:49:00 - {27} 51DD8B21-AD8D-48E9-BC3F-24F46722C748 2025-06-18 16:49:00 - Handle 9 - 3776FE18 2025-06-18 16:49:00 - [9] State: 2 2025-06-18 16:49:00 - [9] HW addr size: 6 2025-06-18 16:49:00 - [9] CurrentAddress: CC:82:7F:54:C3:06 2025-06-18 16:49:00 - [9] PermanentAddress: CC:82:7F:54:C3:06 2025-06-18 16:49:00 - [9] IfType: 1 2025-06-18 16:49:00 - [9] MacAddressChangeable: 1 2025-06-18 16:49:00 - [9] MediaPresentSupported: 1 2025-06-18 16:49:00 - [9] MediaPresent: 1 2025-06-18 16:49:00 - {0} A19832B9-AC25-11D3-9A2D-0090273FC14D 2025-06-18 16:49:00 - {1} 03C4E603-AC28-11D3-9A2D-0090273FC14D 2025-06-18 16:49:00 - {2} 56EC3091-954C-11D2-8E3F-00A0C969723B 2025-06-18 16:49:00 - {3} 09576E91-6D3F-11D2-8E39-00A0C969723B 2025-06-18 16:49:00 - ============================================= 2025-06-18 16:49:00 - MemTest86 V11.3 Pro Build: 1000 (64-bit) 2025-06-18 16:49:00 - ============================================= 2025-06-18 16:49:00 - SMBIOS BIOS INFO Vendor: "American Megatrends International, LLC.", Version: "5.25", Release Date: "11/15/2023" 2025-06-18 16:49:00 - SMBIOS SYSTEM INFO Manufacturer: "Applied Materials", Product: "Compact Server 2.0", Version: "0.9", S/N: "Default string", SKU: "", Family: "" 2025-06-18 16:49:01 - SMBIOS: Found SMBIOS BaseboardInformation (pbLinAddr=0x45D840C5, FormattedLen=15, iTotalLen=102) 2025-06-18 16:49:01 - SMBIOS BASEBOARD INFO Manufacturer: "Applied Materials", Product: "Compact Server 2.0", Version: "1.0", S/N: "Default string", AssetTag: "Default string", LocationInChassis: "Default string" 2025-06-18 16:49:01 - EFI Specifications: 2.80 2025-06-18 16:49:01 - Found blacklist file 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-F42C88C8" (BIOS: "", FLAGS: 1) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-F42386C8" (BIOS: "", FLAGS: 1) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-F4238CC8" (BIOS: "", FLAGS: 8) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-F4208DC8" (BIOS: "", FLAGS: 8) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-27ADBB7B4CEE8E61" (BIOS: "", FLAGS: 20) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-7BA5B2DFE22DDD8C" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-7BA5B2D9E42DDD94" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-AF89B6D9451A490B" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:01 - [BLACKLIST] Adding "Mac-CFF7D910A743CAAF" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Mac-AA95B1DDAB278B95" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Mac-27AD2F918AE68F61" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "80AF" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z97MX-Gaming 5" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z170MX-Gaming 5" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z170X-Gaming 3" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z170X-Gaming 7" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z170X-Gaming GT" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z170X-UD3-CF" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "Z170-HD3P" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "990FXA-UD3" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "990FX Extreme3" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "970A-DS3P" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "X99-Ultra Gaming-CF" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "M5A97 R2.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "M5A97 EVO R2.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "M5A99FX PRO R2.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "M5A99X EVO R2.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "X99-A" (BIOS: "3701", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "X99-A/USB 3.1" (BIOS: "3701", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "X99-A II" (BIOS: "1701", FLAGS: 2) to blacklist 2025-06-18 16:49:02 - [BLACKLIST] Adding "X99-A" (BIOS: "1701", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "Sabertooth X99" (BIOS: "3701", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "SABERTOOTH 990FX R2.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "SABERTOOTH 990FX R3.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "SABERTOOTH 990FX/GEN3 R2.0" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "STRIX X99 GAMING" (BIOS: "1701", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "X99-DELUXE" (BIOS: "3701", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "X99-DELUXE II" (BIOS: "1701", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "RAMPAGE V EXTREME" (BIOS: "3701", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "RAMPAGE V EDITION 10" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "MAXIMUS VIII RANGER" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "P9X79 WS" (BIOS: "", FLAGS: 40) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "P9X79-E WS" (BIOS: "", FLAGS: 40) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "Z9PE-D8 WS" (BIOS: "", FLAGS: 40) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "Z10PE-D8 WS" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "X9DRW" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:03 - [BLACKLIST] Adding "X9DRW-3LN4F+/X9DRW-3TF+" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "X9DR3-F" (BIOS: "", FLAGS: 40) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "X9SRL-F" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "X9DRD-iF" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "X9SRA/X9SRA-3" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "X9DRL-7F" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "151-BE-E097" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "131-HE-E095" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "131-HE-E095-KR" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "151-HE-E999-KR" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "PRIME B350-PLUS" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "PRIME X370-PRO" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "CROSSHAIR VI HERO" (BIOS: "1602", FLAGS: 4) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "CROSSHAIR V FORMULA-Z" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "ROG STRIX X370-F GAMING" (BIOS: "4012", FLAGS: 4) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "OEMSH Product" (BIOS: "", FLAGS: 8) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "OEMAL Product" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "OEMCT Product" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:04 - [BLACKLIST] Adding "OEMWY Product" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "LNVNB161216" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "GA-990FX-GAMING" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "X399 SLI PLUS (MS-7B09)" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "X570 I AORUS PRO WIFI" (BIOS: "F32", FLAGS: 2) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "MS-17EK" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "0F685W" (BIOS: "", FLAGS: 80) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "00V5FJ" (BIOS: "", FLAGS: 100) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "ProLiant DL325 Gen10" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "ProLiant DL385 Gen10" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "ProLiant DL385 Gen10 Plus" (BIOS: "", FLAGS: 4) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "06CDVY" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "Surface Book" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "Surface Book 2" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "Surface Pro" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "Surface Pro 7" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "Surface Pro" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:05 - [BLACKLIST] Adding "Surface Laptop 4" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "Surface Laptop" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "MACH-WX9-PCB" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "MACH-WX9" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "8873" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "0P4NHH" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "XPS 17 9710" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "XPS 15 9510" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "01V4T3" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "0VX936" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "H12DST-B" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "H12DSi-NT6" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "C3758D4I-4L" (BIOS: "", FLAGS: 2) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] Adding "S5507QAD" (BIOS: "", FLAGS: 10) to blacklist 2025-06-18 16:49:06 - [BLACKLIST] 95 boards added to blacklist 2025-06-18 16:49:06 - Console Control protocol workaround enabled 2025-06-18 16:49:06 - Number of console modes: 4 2025-06-18 16:49:06 - Mode 0: 80 x 25 2025-06-18 16:49:06 - Mode 1: 80 x 50 2025-06-18 16:49:07 - Mode 2: 100 x 31 2025-06-18 16:49:07 - Mode 3: 240 x 63 2025-06-18 16:49:07 - Console attribute: 15 2025-06-18 16:49:07 - Initializing localization strings 2025-06-18 16:49:07 - Language en-US is supported 2025-06-18 16:49:07 - GetGlyph failed for character 0x00C0 (Warning Unknown Glyph) 2025-06-18 16:49:07 - Language fr-FR is not supported 2025-06-18 16:49:07 - GetGlyph failed for character 0x00C0 (Warning Unknown Glyph) 2025-06-18 16:49:07 - Language it-IT is not supported 2025-06-18 16:49:07 - GetGlyph failed for character 0x00C1 (Warning Unknown Glyph) 2025-06-18 16:49:07 - Language es-AR is not supported 2025-06-18 16:49:07 - GetGlyph failed for character 0x00C0 (Warning Unknown Glyph) 2025-06-18 16:49:07 - Language pt-BR is not supported 2025-06-18 16:49:07 - GetGlyph failed for character 0x00C0 (Warning Unknown Glyph) 2025-06-18 16:49:07 - Language ca-ES is not supported 2025-06-18 16:49:07 - GetGlyph failed for character 0x00C4 (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language de-DE is not supported 2025-06-18 16:49:08 - GetGlyph failed for character 0x00C1 (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language cs-CZ is not supported 2025-06-18 16:49:08 - GetGlyph failed for character 0x0104 (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language pl-PL is not supported 2025-06-18 16:49:08 - GetGlyph failed for character 0x0410 (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language ru-RU is not supported 2025-06-18 16:49:08 - GetGlyph failed for character 0x3041 (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language ja-JP is not supported 2025-06-18 16:49:08 - GetGlyph failed for character 0x4E0F (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language zh-CN is not supported 2025-06-18 16:49:08 - GetGlyph failed for character 0xF944 (Warning Unknown Glyph) 2025-06-18 16:49:08 - Language zh-HK is not supported 2025-06-18 16:49:08 - Font does not support all languages. Installing unicode font... 2025-06-18 16:49:08 - InitFont - Font header version: 1.1 2025-06-18 16:49:08 - InitFont - Number of narrow glyphs: 7110 2025-06-18 16:49:08 - InitFont - Number of wide glyphs: 49976 2025-06-18 16:49:09 - Language en-US is supported 2025-06-18 16:49:09 - Language fr-FR is supported 2025-06-18 16:49:09 - Language it-IT is supported 2025-06-18 16:49:09 - Language es-AR is supported 2025-06-18 16:49:09 - Language pt-BR is supported 2025-06-18 16:49:09 - Language ca-ES is supported 2025-06-18 16:49:09 - Language de-DE is supported 2025-06-18 16:49:09 - Language cs-CZ is supported 2025-06-18 16:49:09 - Language pl-PL is supported 2025-06-18 16:49:09 - Language ru-RU is supported 2025-06-18 16:49:09 - Language ja-JP is supported 2025-06-18 16:49:09 - Language zh-CN is supported 2025-06-18 16:49:09 - Language zh-HK is supported 2025-06-18 16:49:09 - iMS support is NOT available 2025-06-18 16:49:09 - Initializing screen for graphics 2025-06-18 16:49:10 - Number of graphics modes: 7 2025-06-18 16:49:10 - Mode 0: 1920 x 1200 2025-06-18 16:49:10 - Mode 1: 640 x 480 2025-06-18 16:49:10 - Mode 2: 800 x 600 [Current] 2025-06-18 16:49:10 - Mode 3: 1024 x 768 2025-06-18 16:49:10 - Mode 4: 1280 x 1024 2025-06-18 16:49:10 - Mode 5: 1600 x 1200 2025-06-18 16:49:10 - Mode 6: 1920 x 1080 2025-06-18 16:49:10 - Getting CPUID 2025-06-18 16:49:10 - Getting cache size 2025-06-18 16:49:10 - get_cache_size - Vendor ID: GenuineIntel Brand ID: 12th Gen Intel(R) Core(TM) i5-12500E 2025-06-18 16:49:10 - L1 data cache: 48, 2, 8 [0x1C004121] 2025-06-18 16:49:10 - L1d t2 linesize 64 linepart 1 ways 12 sets 64, size 48KB 2025-06-18 16:49:11 - L1i t2 linesize 64 linepart 1 ways 8 sets 64, size 32KB 2025-06-18 16:49:11 - L2u t2 linesize 64 linepart 1 ways 10 sets 2048, size 1280KB 2025-06-18 16:49:11 - L3u t16 linesize 64 linepart 1 ways 12 sets 24576, size 18432KB 2025-06-18 16:49:11 - L0 cache: 0 KB (1) 2025-06-18 16:49:11 - L0u t1 linesize 1 linepart 1 ways 1 sets 1, size 0KB 2025-06-18 16:49:11 - L1 instruction cache size: 4 x 32KB 2025-06-18 16:49:11 - L1 data cache size: 4 x 48KB 2025-06-18 16:49:11 - L2 cache size: 4 x 1280KB 2025-06-18 16:49:11 - L3 cache size: 18432KB 2025-06-18 16:49:11 - Measuring CPU/cache/mem speed 2025-06-18 16:49:11 - cpuspeed - freq = 100000000 2025-06-18 16:49:11 - cpuspeed - counter = 2299886459 2025-06-18 16:49:11 - cpuspeed - tsc = 304511964917 2025-06-18 16:49:11 - hpet_init - Found RSDP. Version: 2 2025-06-18 16:49:11 - hpet_init - Found XSDT. Entry Count: 30 2025-06-18 16:49:11 - hpet_init - Found ACPI table: FACP Version: 6 2025-06-18 16:49:11 - hpet_init - Found ACPI table: FIDT Version: 1 2025-06-18 16:49:11 - hpet_init - Found ACPI table: SSDT Version: 2 2025-06-18 16:49:11 - hpet_init - Found ACPI table: SSDT Version: 2 2025-06-18 16:49:11 - hpet_init - Found ACPI table: SSDT Version: 2 2025-06-18 16:49:11 - hpet_init - Found ACPI table: HPET Version: 1 2025-06-18 16:49:11 - hpet_init - HPET base address: 0xFED00000 2025-06-18 16:49:11 - hpet_init - HPET gen cap: 0x31ABA858086A701 (Period: 52083333fs) 2025-06-18 16:49:12 - hpet_init - HPET gen cfg: 0x1 2025-06-18 16:49:12 - hpet_init - main counter value (1): 1976739506 2025-06-18 16:49:12 - hpet_init - main counter value (2): 1977371064 2025-06-18 16:49:12 - cpuspeed_hpet - HPET counter start: 1977968492, HPET counter end: 1978928492 2025-06-18 16:49:12 - cpuspeed_hpet - start TSC: 307135106865, end TSC: 307282803183 (difference: 147696318) 2025-06-18 16:49:12 - cpu_cache_speed - (Attempt 1) clock cycle (ms): 2953926 2025-06-18 16:49:12 - cpuspeed_hpet - HPET counter start: 1980619761, HPET counter end: 1981579761 2025-06-18 16:49:12 - cpuspeed_hpet - start TSC: 307544496645, end TSC: 307692138409 (difference: 147641764) 2025-06-18 16:49:12 - cpu_cache_speed - (Attempt 2) clock cycle (ms): 2952835 2025-06-18 16:49:12 - cpuspeed_hpet - HPET counter start: 1983261659, HPET counter end: 1984221659 2025-06-18 16:49:12 - cpuspeed_hpet - start TSC: 307952394145, end TSC: 308100064265 (difference: 147670120) 2025-06-18 16:49:12 - cpu_cache_speed - (Attempt 3) clock cycle (ms): 2953402 2025-06-18 16:49:12 - cpuspeed_hpet - HPET counter start: 1985906684, HPET counter end: 1986866684 2025-06-18 16:49:12 - cpuspeed_hpet - start TSC: 308360816749, end TSC: 308508524653 (difference: 147707904) 2025-06-18 16:49:13 - cpu_cache_speed - (Attempt 4) clock cycle (ms): 2954158 2025-06-18 16:49:13 - cpuspeed_hpet - HPET counter start: 1997659235, HPET counter end: 1998619235 2025-06-18 16:49:13 - cpuspeed_hpet - start TSC: 310170075293, end TSC: 310317747901 (difference: 147672608) 2025-06-18 16:49:13 - cpu_cache_speed - (Attempt 5) clock cycle (ms): 2953452 2025-06-18 16:49:13 - cpu_cache_speed - Using average of last 3 samples (2953452, 2954158, 2953402) 2025-06-18 16:49:13 - cpu_cache_speed - CPU speed: 2953.6MHz 2025-06-18 16:49:13 - cpu_cache_speed - measuring L1 cache speed at 0x36BBC000 (size: 48 KB, iter: 208333) 2025-06-18 16:49:13 - memspeed - elapsed time = 73 ms 2025-06-18 16:49:13 - cpu_cache_speed - L1 cache speed: 136083 MB/s 2025-06-18 16:49:13 - cpu_cache_speed - measuring L2 cache speed at 0x367E1000 (size: 1280 KB, iter: 7812) 2025-06-18 16:49:14 - memspeed - elapsed time = 352 ms 2025-06-18 16:49:14 - cpu_cache_speed - L2 cache speed: 28347 MB/s 2025-06-18 16:49:14 - cpu_cache_speed - measuring L3 cache speed at 0x34E48000 (size: 18432 KB, iter: 542) 2025-06-18 16:49:15 - memspeed - elapsed time = 791 ms 2025-06-18 16:49:15 - cpu_cache_speed - L3 cache speed: 12618 MB/s 2025-06-18 16:49:15 - get_mem_speed - measuring mem speed at 0x28738000 (size: 158336 KB, iter: 31) 2025-06-18 16:49:16 - memspeed - elapsed time = 742 ms 2025-06-18 16:49:16 - get_mem_speed - mem speed: 7467 MB/s 2025-06-18 16:49:16 - memory latency - allocate memory 2025-06-18 16:49:16 - memory latency - randomize range 2025-06-18 16:49:17 - memory latency - build linked list 2025-06-18 16:49:17 - memory latency - start test 2025-06-18 16:49:17 - memory latency - test completed (loops=5, rpl=2097152) 2025-06-18 16:49:18 - cpu_cache_speed - Memory latency: 56.648 ns 2025-06-18 16:49:18 - Retrieving CPU MSR data 2025-06-18 16:49:18 - GetIntelArchitectureSpecificMSRInfo - CPU 12th Gen Intel(R) Core(TM) i5-12500E: Family: 0x06 Model: 0x97 Stepping: 0x5 2025-06-18 16:49:18 - GetIntelArchitectureSpecificMSRInfo - Nehalem et al detected 2025-06-18 16:49:18 - GetAlderLakeFamilyMSRInfo_Static - Get MSR info 2025-06-18 16:49:18 - MSR[0xCE] = 08080838F0811D00 2025-06-18 16:49:18 - MSR[0x1A2] = 0000000080641400 2025-06-18 16:49:18 - MSR[0x1AD] = 282828282B2B2D2D 2025-06-18 16:49:18 - IsIntelTurboSupported - CPUID[0x6][EAX] = 00DF8FF7 2025-06-18 16:49:18 - DisableTurboMode - MSR[1A0] = 0000000000850089 2025-06-18 16:49:18 - DisableTurboMode - New MSR[1A0] = 0000004000850089 2025-06-18 16:49:18 - GetIntelArchitectureSpecificMSRInfo - Turbo disabled 2025-06-18 16:49:18 - IsIntelPerfMonSupported - CPUID[0xA][EDX] = 00008604 2025-06-18 16:49:18 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - CPUID[0xA][EDX] = 00008604 2025-06-18 16:49:18 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38F] = 00000000000000FF 2025-06-18 16:49:18 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38D] = 0000000000000000 2025-06-18 16:49:19 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x199] = 0000000000000800 2025-06-18 16:49:19 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x198] = 0000162C00000800 2025-06-18 16:49:19 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - high perf counter freq = 2953670000 2025-06-18 16:49:21 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = 1424315568 2025-06-18 16:49:22 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = 1114296, FreqRef in KHz = 2953670, Ratio = 37 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = 1426758801 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = 1113112, FreqRef in KHz = 2953670, Ratio = 37 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - CPUID[0xA][EDX] = 00008604 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38F] = 00000000000000FF 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38D] = 0000000000000000 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x199] = 0000000000000800 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x198] = 0000162600000800 2025-06-18 16:49:27 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - high perf counter freq = 2953670000 2025-06-18 16:49:30 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = 1422836467 2025-06-18 16:49:31 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = 1114622, FreqRef in KHz = 2953670, Ratio = 37 2025-06-18 16:49:36 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = 1420557737 2025-06-18 16:49:36 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = 1117839, FreqRef in KHz = 2953669, Ratio = 37 2025-06-18 16:49:36 - GetIntelArchitectureSpecificMSRInfo - MaxRatio = 100 2025-06-18 16:49:36 - GetIntelArchitectureSpecificMSRInfo - Mult = 2900 2025-06-18 16:49:36 - GetIntelArchitectureSpecificMSRInfo - raw_freq_cpu = 2953650 2025-06-18 16:49:36 - EnableTurboMode - MSR[1A0] = 0000004000850089 2025-06-18 16:49:36 - EnableTurboMode - New MSR[1A0] = 0000000000850089 2025-06-18 16:49:36 - EnableTurboMode - MSR[0x198] = 0000165500000800 (Current multiplier: 8) 2025-06-18 16:49:36 - EnableTurboMode - MSR[0x199] = 0000000000000800 (Target multiplier: 8, Max1CTurbo: 45) 2025-06-18 16:49:36 - EnableTurboMode - Setting MSR[0x199] to 0000000000002D00 2025-06-18 16:49:36 - EnableTurboMode - New MSR[0x199] = 0000000000002D00 (Target multiplier: 45) 2025-06-18 16:49:36 - GetIntelArchitectureSpecificMSRInfo - TargetRatio = 152 2025-06-18 16:49:37 - IsIntelPerfMonSupported - CPUID[0xA][EDX] = 00008604 2025-06-18 16:49:37 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - CPUID[0xA][EDX] = 00008604 2025-06-18 16:49:37 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38F] = 00000000000000FF 2025-06-18 16:49:37 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38D] = 0000000000000000 2025-06-18 16:49:37 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x199] = 0000000000002D00 2025-06-18 16:49:37 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x198] = 0000224300002800 2025-06-18 16:49:37 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - high perf counter freq = 2953670000 2025-06-18 16:49:38 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = 388129984 2025-06-18 16:49:38 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = 4039690, FreqRef in KHz = 2953669, Ratio = 136 2025-06-18 16:49:40 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = 387975730 2025-06-18 16:49:40 - GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = 4039689, FreqRef in KHz = 2953669, Ratio = 136 2025-06-18 16:49:40 - GetIntelArchitectureSpecificMSRInfo - MaxTurboRatio = 136 2025-06-18 16:49:40 - GetIntelArchitectureSpecificMSRInfo - TurboMult = 3944 2025-06-18 16:49:40 - GetIntelArchitectureSpecificMSRInfo - new TurboMult = 4024 2025-06-18 16:49:40 - GetIntelArchitectureSpecificMSRInfo - CPUSpeedTurbo = 4098444 2025-06-18 16:49:40 - GetIntelArchitectureSpecificMSRInfo - CPUSpeedTurboTheoreticalMax = 4583250 2025-06-18 16:49:40 - GetIntelArchitectureSpecificMSRInfo - Freq: 2953650KHz (Ratio: 2900, ExtClk: 101850KHz), Turbo: 4098444KHz, (Ratio: 4024, ExtClk: 0KHz) (Theoretical max: 4583250KHz) 2025-06-18 16:49:40 - Getting memory size 2025-06-18 16:49:40 - 0x000000000000 - 0x00000009DFFF (632KB) {Free Memory} 2025-06-18 16:49:40 - 0x00000009E000 - 0x00000009EFFF (4KB) {Reserved Memory} 2025-06-18 16:49:40 - 0x00000009F000 - 0x00000009FFFF (4KB) {Boot Services Data} 2025-06-18 16:49:40 - 0x000000100000 - 0x00002007FFFF (511MB) {Free Memory} 2025-06-18 16:49:40 - 0x000020081000 - 0x0000321D7FFF (289MB) {Free Memory} 2025-06-18 16:49:40 - 0x0000321D8000 - 0x000032257FFF (512KB) {Boot Services Data} 2025-06-18 16:49:40 - 0x000032258000 - 0x000036047FFF (61MB) {Free Memory} 2025-06-18 16:49:40 - 0x000036048000 - 0x000036287FFF (2MB) {Boot Services Data} 2025-06-18 16:49:40 - 0x000036288000 - 0x000036920FFF (6MB) {Free Memory} 2025-06-18 16:49:41 - 0x000036921000 - 0x000036AD5FFF (1748KB) {Loader Code} 2025-06-18 16:49:41 - 0x000036AD6000 - 0x000036BC5FFF (960KB) {Free Memory} 2025-06-18 16:49:41 - 0x000036BC6000 - 0x00003AABFFFF (62MB) {Boot Services Data} 2025-06-18 16:49:41 - 0x00003AAC0000 - 0x00003AADBFFF (112KB) {Boot Services Code} 2025-06-18 16:49:41 - 0x00003AADC000 - 0x00003AB07FFF (176KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB08000 - 0x00003AB08FFF (4KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB09000 - 0x00003AB0DFFF (20KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB0E000 - 0x00003AB0FFFF (8KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB10000 - 0x00003AB14FFF (20KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB15000 - 0x00003AB18FFF (16KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB19000 - 0x00003AB20FFF (32KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB21000 - 0x00003AB21FFF (4KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB22000 - 0x00003AB27FFF (24KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB28000 - 0x00003AB28FFF (4KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB29000 - 0x00003AB3FFFF (92KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB40000 - 0x00003AB43FFF (16KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB44000 - 0x00003AB4BFFF (32KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB4C000 - 0x00003AB53FFF (32KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB54000 - 0x00003AB6BFFF (96KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB6C000 - 0x00003AB71FFF (24KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AB72000 - 0x00003AB97FFF (152KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AB98000 - 0x00003AC34FFF (628KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AC35000 - 0x00003AC73FFF (252KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AC74000 - 0x00003AC76FFF (12KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AC77000 - 0x00003AD63FFF (948KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AD64000 - 0x00003AD6AFFF (28KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AD6B000 - 0x00003AD75FFF (44KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AD76000 - 0x00003AD7AFFF (20KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003AD7B000 - 0x00003AD83FFF (36KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003AD84000 - 0x00003ADBAFFF (220KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003ADBB000 - 0x00003CB9CFFF (29MB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003CB9D000 - 0x00003CBAFFFF (76KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003CBB0000 - 0x00003CBBFFFF (64KB) {Boot Services Data} 2025-06-18 16:49:42 - 0x00003CBC0000 - 0x00003CBC7FFF (32KB) {Boot Services Code} 2025-06-18 16:49:42 - 0x00003CBC8000 - 0x0000403D6FFF (56MB) {Boot Services Data} 2025-06-18 16:49:43 - 0x0000403D7000 - 0x000040A8BFFF (6MB) {Free Memory} 2025-06-18 16:49:43 - 0x000040A8C000 - 0x00004255FFFF (26MB) {Boot Services Code} 2025-06-18 16:49:43 - 0x000042560000 - 0x00004565FFFF (49MB) {Reserved Memory} 2025-06-18 16:49:43 - 0x000045660000 - 0x000045738FFF (868KB) {ACPI Tables} 2025-06-18 16:49:43 - 0x000045739000 - 0x000045816FFF (888KB) {ACPI Non-volatile} 2025-06-18 16:49:43 - 0x000045817000 - 0x000045F65FFF (7MB) {Runtime Services Data} 2025-06-18 16:49:43 - 0x000045F66000 - 0x000045FFEFFF (612KB) {Runtime Services Code} 2025-06-18 16:49:43 - 0x000045FFF000 - 0x000045FFFFFF (4KB) {Boot Services Data} 2025-06-18 16:49:44 - 0x000100000000 - 0x0004AFBFFFFF (15100MB) {Free Memory} 2025-06-18 16:49:44 - 0x0000000A0000 - 0x0000000FFFFF (384KB) {Reserved Memory} 2025-06-18 16:49:44 - 0x000020080000 - 0x000020080FFF (4KB) {Reserved Memory} 2025-06-18 16:49:44 - 0x000046000000 - 0x000049FFFFFF (64MB) {Reserved Memory} 2025-06-18 16:49:44 - 0x00004A200000 - 0x00004A3FFFFF (2MB) {Reserved Memory} 2025-06-18 16:49:44 - 0x00004B000000 - 0x00004BFFFFFF (16MB) {Reserved Memory} 2025-06-18 16:49:44 - 0x00004C000000 - 0x0000503FFFFF (68MB) {Reserved Memory} 2025-06-18 16:49:44 - 0x0000C0000000 - 0x0000CFFFFFFF (256MB) {OS Memory-mapped IO} 2025-06-18 16:49:44 - 0x0000FE000000 - 0x0000FE010FFF (68KB) {OS Memory-mapped IO} 2025-06-18 16:49:44 - 0x0000FEC00000 - 0x0000FEC00FFF (4KB) {OS Memory-mapped IO} 2025-06-18 16:49:44 - 0x0000FED00000 - 0x0000FED00FFF (4KB) {OS Memory-mapped IO} 2025-06-18 16:49:44 - 0x0000FED20000 - 0x0000FED7FFFF (384KB) {Reserved Memory} 2025-06-18 16:49:44 - 0x0000FEE00000 - 0x0000FEE00FFF (4KB) {OS Memory-mapped IO} 2025-06-18 16:49:44 - 0x0000FF000000 - 0x0000FFFFFFFF (16MB) {OS Memory-mapped IO} 2025-06-18 16:49:44 - 2025-06-18 16:49:44 - Available Memory: 0x3E69A3000 (15GB) 2025-06-18 16:49:44 - Reserved Memory: 0x298D1000 (664MB) 2025-06-18 16:49:44 - mem_size - Number of entries: 66 2025-06-18 16:49:44 - mem_size - Max address: 0x4AFC00000 2025-06-18 16:49:44 - mem_size - Total memory size (16955211776 bytes) 2025-06-18 16:49:44 - Attempting to open configuration file: Compact Server 2.0-mt86.cfg 2025-06-18 16:49:44 - Attempting to open configuration file: 16GB-mt86.cfg 2025-06-18 16:49:44 - Attempting to open configuration file: mt86.cfg 2025-06-18 16:49:44 - Found configuration file: mt86.cfg 2025-06-18 16:49:44 - [CONFIG] Default configuration set to 1 2025-06-18 16:49:44 - Successfully read configuration file 2025-06-18 16:49:44 - Parsing command line: "" 2025-06-18 16:49:45 - Successfully located the PI MpService protocol. 2025-06-18 16:49:45 - BSP is Proc 0 2025-06-18 16:49:45 - This platform has 12 logical processors of which 12 are enabled. 2025-06-18 16:49:45 - ProcID Enabled Type Status Pkg Core Thread Hyperthread? 2025-06-18 16:49:45 - -------- -------- ---- -------- ----- ---- ------ ------------ 2025-06-18 16:49:45 - Get Proc Info Proc #0 2025-06-18 16:49:45 - 00000000 Y BSP 00000007 0 0 0 N 2025-06-18 16:49:45 - Get Proc Info Proc #1 2025-06-18 16:49:45 - 00000001 Y AP 00000006 0 0 1 Y 2025-06-18 16:49:45 - Get Proc Info Proc #2 2025-06-18 16:49:45 - 00000002 Y AP 00000006 0 1 0 N 2025-06-18 16:49:46 - Get Proc Info Proc #3 2025-06-18 16:49:46 - 00000003 Y AP 00000006 0 1 1 Y 2025-06-18 16:49:46 - Get Proc Info Proc #4 2025-06-18 16:49:46 - 00000004 Y AP 00000006 0 2 0 N 2025-06-18 16:49:46 - Get Proc Info Proc #5 2025-06-18 16:49:46 - 00000005 Y AP 00000006 0 2 1 Y 2025-06-18 16:49:46 - Get Proc Info Proc #6 2025-06-18 16:49:46 - 00000006 Y AP 00000006 0 3 0 N 2025-06-18 16:49:46 - Get Proc Info Proc #7 2025-06-18 16:49:46 - 00000007 Y AP 00000006 0 3 1 Y 2025-06-18 16:49:46 - Get Proc Info Proc #8 2025-06-18 16:49:46 - 00000008 Y AP 00000006 0 4 0 N 2025-06-18 16:49:46 - Get Proc Info Proc #9 2025-06-18 16:49:46 - 00000009 Y AP 00000006 0 4 1 Y 2025-06-18 16:49:46 - Get Proc Info Proc #10 2025-06-18 16:49:46 - 0000000A Y AP 00000006 0 5 0 N 2025-06-18 16:49:46 - Get Proc Info Proc #11 2025-06-18 16:49:46 - 0000000B Y AP 00000006 0 5 1 Y 2025-06-18 16:49:46 - Package ProcNum 2025-06-18 16:49:46 - 0 0 2025-06-18 16:49:46 - This platform has 12 logical processors of which 12 are enabled. 2025-06-18 16:49:46 - Number of hyperthreads detected: 6 (Total threads: 12) 2025-06-18 16:49:46 - Disabling all hyperthreads 2025-06-18 16:49:46 - Disabling hyperthread processor 1 2025-06-18 16:49:46 - Disabling hyperthread processor 3 2025-06-18 16:49:47 - Disabling hyperthread processor 5 2025-06-18 16:49:47 - Disabling hyperthread processor 7 2025-06-18 16:49:47 - Disabling hyperthread processor 9 2025-06-18 16:49:47 - Disabling hyperthread processor 11 2025-06-18 16:49:47 - Testing MP support 2025-06-18 16:49:47 - MPSupportTestMPServices - AP dispatch test 2025-06-18 16:49:47 - MPSupportTestMPServices - Starting AP#2 2025-06-18 16:49:47 - MPSupportTestMPServices - Starting AP#4 2025-06-18 16:49:47 - MPSupportTestMPServices - Starting AP#6 2025-06-18 16:49:47 - MPSupportTestMPServices - Starting AP#8 2025-06-18 16:49:47 - MPSupportTestMPServices - Starting AP#10 2025-06-18 16:49:47 - MPSupportTestMPServices - Waiting for AP's to complete execution 2025-06-18 16:49:48 - MPSupportTestMPServices - CPU #4 finished execution 2025-06-18 16:49:48 - MPSupportTestMPServices - CPU #6 finished execution 2025-06-18 16:49:48 - MPSupportTestMPServices - CPU #2 finished execution 2025-06-18 16:49:48 - MPSupportTestMPServices - CPU #8 finished execution 2025-06-18 16:49:48 - MPSupportTestMPServices - CPU #10 finished execution 2025-06-18 16:49:48 - MPSupportTestMPServices - AP dispatch test complete 2025-06-18 16:49:48 - MP test passed. Setting default CPU mode to PARALLEL 2025-06-18 16:49:49 - Getting memory controller info 2025-06-18 16:49:49 - find_mem_controller - found Intel Alder Lake (8086:4650) at 0-0-0 2025-06-18 16:49:49 - Intel Alder Lake chipset init 2025-06-18 16:49:49 - MCHBAR_LO=FEDC0001 2025-06-18 16:49:49 - MCHBAR_HI=00000000 2025-06-18 16:49:49 - MCHBAR=00000000FEDC0000 2025-06-18 16:49:49 - CAPID0_A=40002050 (ECC capable: yes) 2025-06-18 16:49:49 - CAPID0_C=C6402200 2025-06-18 16:49:49 - CAPID0_E=001E1640 (IBECC disable: yes) 2025-06-18 16:49:49 - [MC0] INTRA_MAD_0=FFFFFFFF, INTRA_MAD_1=FFFFFFFF 2025-06-18 16:49:49 - [MC1] INTRA_MAD_0=00003100, INTRA_MAD_1=00003100 2025-06-18 16:49:49 - ERRSTS=0000 2025-06-18 16:49:49 - TOLUD=50400001 2025-06-18 16:49:49 - TOM=0000000400000001 2025-06-18 16:49:49 - tolud=50400000 tom=400000000 2025-06-18 16:49:49 - TOUUD=00000004AFC00001 2025-06-18 16:49:49 - [MC0] MAD_MC_HASH=FFFFFFFF 2025-06-18 16:49:50 - [MC0] invalid MAD_MC_HASH - MC may not exist 2025-06-18 16:49:50 - [MC1] MAD_MC_HASH=00000006 2025-06-18 16:49:50 - [MC1] REMAPBASE=0000007FFFF00000 2025-06-18 16:49:50 - [MC1] REMAPLIMIT=0000000000000000 2025-06-18 16:49:50 - [MC1] MC_INIT_STATE=00000001 2025-06-18 16:49:50 - [MC1] MAD_INTER_CH=08010001 2025-06-18 16:49:50 - [MC1] Ch width=x32 2025-06-18 16:49:50 - [MC1] Ch S size=8589934592 2025-06-18 16:49:50 - [MC1] Ch L map=0 2025-06-18 16:49:50 - [MC1] DDR type=DDR5 2025-06-18 16:49:50 - [MC1] CHANNEL_HASH=130C3200 2025-06-18 16:49:50 - [MC1] CHANNEL_EHASH=00000000 2025-06-18 16:49:50 - [MC1, Ch0] TC_PRE=0139307500422027 2025-06-18 16:49:50 - [MC1, Ch0] TC_ODT=0000008026280000 2025-06-18 16:49:50 - [MC1, Ch0] SC_GS_CFG=0C0084848FC00029 2025-06-18 16:49:50 - [MC1] MAD_INTRA_CH0=00003100 2025-06-18 16:49:50 - [MC1] MAD_DIMM_CH0=D0000010 2025-06-18 16:49:50 - [MC1] Ch0 DIMM L size=8589934592 2025-06-18 16:49:51 - [MC1] Ch0 DIMM L ranks=1 2025-06-18 16:49:51 - [MC1] Ch0 DIMM L width=x8 2025-06-18 16:49:51 - [MC1] Ch0 DIMM S size=0 2025-06-18 16:49:51 - [MC1] Ch0 DIMM S ranks=1 2025-06-18 16:49:51 - [MC1] Ch0 DIMM S width=x8 2025-06-18 16:49:51 - [MC1] Ch0 DIMM L map=0 2025-06-18 16:49:51 - [MC1, Ch1] TC_PRE=0139307500422027 2025-06-18 16:49:51 - [MC1, Ch1] TC_ODT=0000008026280000 2025-06-18 16:49:51 - [MC1, Ch1] SC_GS_CFG=0C0084848FC00029 2025-06-18 16:49:51 - [MC1] MAD_INTRA_CH1=00003100 2025-06-18 16:49:51 - [MC1] MAD_DIMM_CH1=D0000010 2025-06-18 16:49:51 - [MC1] Ch1 DIMM L size=8589934592 2025-06-18 16:49:51 - [MC1] Ch1 DIMM L ranks=1 2025-06-18 16:49:51 - [MC1] Ch1 DIMM L width=x8 2025-06-18 16:49:51 - [MC1] Ch1 DIMM S size=0 2025-06-18 16:49:51 - [MC1] Ch1 DIMM S ranks=1 2025-06-18 16:49:51 - [MC1] Ch1 DIMM S width=x8 2025-06-18 16:49:51 - [MC1] Ch1 DIMM L map=0 2025-06-18 16:49:51 - [MC1] total size=17179869184 2025-06-18 16:49:52 - find_mem_controller - Intel Alder Lake (8086:4650) at 0-0-0 2025-06-18 16:49:52 - find_mem_controller - Intel Alder Lake (Ch mode: 2, ECC mode: {detect: yes, correct: yes, scrub: no, chipkill: no, IBECC: no}) 2025-06-18 16:49:52 - ECC polling enabled 2025-06-18 16:49:52 - Applying configurations 2025-06-18 16:49:52 - [CONFIG] This platform has 12 logical processors of which 6 are enabled. 2025-06-18 16:49:52 - Applying configurations complete 2025-06-18 16:49:52 - Getting memory SPD info 2025-06-18 16:49:52 - Attempting to enable any disabled SMBus controllers... 2025-06-18 16:49:52 - Attempting to enable SMBUS: 2025-06-18 16:49:52 - Searching PCI for SMBus Controller 2025-06-18 16:49:52 - {00:1F:04} SMBus Configuration Registers: 2025-06-18 16:49:52 - 00: 7AA38086 02800000 0C050011 00000000 2025-06-18 16:49:52 - 10: 01120004 00000060 00000000 00000000 2025-06-18 16:49:52 - 20: 0000EFA1 00000000 00000000 72708086 2025-06-18 16:49:52 - 30: 00000000 00000000 00000000 000003FF 2025-06-18 16:49:53 - 40: 00000011 00000000 00000000 00000000 2025-06-18 16:49:53 - 50: 00000401 00000101 00000000 00000000 2025-06-18 16:49:53 - 60: 00050504 0A0A0000 00000000 00000000 2025-06-18 16:49:53 - 70: 00000000 00000000 00000000 00000000 2025-06-18 16:49:53 - 80: 00000024 00000000 00000000 00000000 2025-06-18 16:49:53 - 90: 01210000 00000C00 0120001F 00000E00 2025-06-18 16:49:53 - A0: 00000000 00000000 00000000 00000000 2025-06-18 16:49:53 - B0: 00000000 00000000 00000000 00000000 2025-06-18 16:49:53 - C0: 00000000 00000000 00000000 00000000 2025-06-18 16:49:53 - D0: 00000000 00000000 00000000 00000000 2025-06-18 16:49:53 - E0: 00000000 00000000 00000000 00000000 2025-06-18 16:49:53 - F0: 00000000 00000000 00130000 00000000 2025-06-18 16:49:53 - Found SMBus device: VID:8086 DID:7AA3 Bus:00 Dev:1F Fun:04 IO Add:EFA0 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 [Intel Alder Lake-S SMBus] 2025-06-18 16:49:53 - Finished searching PCI for SMBus Controller 2025-06-18 16:49:53 - Found 1 SMBus controllers 2025-06-18 16:49:53 - [Intel Alder Lake-S SMBus Bus:00 Dev:1F Fun:04 Add:EFA0] Looking for SPD 2025-06-18 16:49:53 - CMD: 02800000 2025-06-18 16:49:53 - Setting IOSE=1 2025-06-18 16:49:53 - HCFG: 00000011 2025-06-18 16:49:53 - Expanding SPD info array (0 => 16) 2025-06-18 16:49:53 - MemoryInfo(0x36BA7018, 121408 bytes) 2025-06-18 16:49:53 - Raw SPD bytes for DIMM#0 (Channel -1, Slot -1): 2025-06-18 16:49:53 - 51 18 0A 86 32 03 32 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 00 00 00 00 00 00 00 00 00 00 00 00 70 03 00 00 2025-06-18 16:49:54 - 50 05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 00 2C 02 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:54 - 30 10 12 03 04 00 20 62 00 00 00 00 B0 02 01 00 2025-06-18 16:49:54 - 00 00 00 00 65 01 F2 03 7A AD 00 00 00 00 80 3E 2025-06-18 16:49:54 - 80 3E 80 3E 00 7D 80 BB 30 75 27 01 A0 00 82 00 2025-06-18 16:49:55 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:55 - 00 00 00 00 00 00 88 13 08 88 13 08 20 4E 20 10 2025-06-18 16:49:55 - 27 10 A4 2C 20 10 27 10 C4 09 04 4C 1D 0C 00 00 2025-06-18 16:49:55 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:55 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:55 - HCFG=11 (Intel801_SPD5) 2025-06-18 16:49:55 - Device detected on SMBUS at address 52 (Intel801_SPD5) 2025-06-18 16:49:55 - MR0 - Device Type MSB: 51 2025-06-18 16:49:55 - MR1 - Device Type LSB: 18 2025-06-18 16:49:55 - MR2 - Device Revision: 0A 2025-06-18 16:49:55 - MR3 - Device Revision: 86 2025-06-18 16:49:55 - MR4 - Device Revision: 32 2025-06-18 16:49:55 - MR5 - Device Capability: 03 2025-06-18 16:49:55 - MR11 - I2C Legacy Mode Device Configuration: 00 2025-06-18 16:49:55 - MR12 - NVM Protection Configuration: 00 2025-06-18 16:49:55 - MR13 - NVM Protection Configuration: 00 2025-06-18 16:49:55 - MR18 - Device Configuration: 00 (INF_SEL=0) 2025-06-18 16:49:55 - MR52 - Hub and Thermal Sensor Error Status: 00 2025-06-18 16:49:55 - I2C block read start 2025-06-18 16:49:55 - smbBlockDataIntel801: [Attempt 0] Reading 1024 bytes 2025-06-18 16:49:55 - I2C block read completed successfully 2025-06-18 16:49:55 - Raw SPD bytes for DIMM#0 (Channel -1, Slot -1): 2025-06-18 16:49:55 - 30 10 12 03 04 00 20 62 00 00 00 00 B0 02 01 00 2025-06-18 16:49:55 - 00 00 00 00 65 01 F2 03 7A AD 00 00 00 00 80 3E 2025-06-18 16:49:55 - 80 3E 80 3E 00 7D 80 BB 30 75 27 01 A0 00 82 00 2025-06-18 16:49:55 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:55 - 00 00 00 00 00 00 88 13 08 88 13 08 20 4E 20 10 2025-06-18 16:49:55 - 27 10 A4 2C 20 10 27 10 C4 09 04 4C 1D 0C 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 10 00 86 32 80 15 8A 8C 82 15 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 0F 01 03 82 00 2A 00 00 00 00 2025-06-18 16:49:56 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 53 AF 2025-06-18 16:49:57 - 8A C8 02 23 49 50 63 00 01 53 51 52 2D 53 44 35 2025-06-18 16:49:57 - 4E 31 36 47 35 4B 36 53 45 50 42 20 20 20 20 20 2025-06-18 16:49:57 - 20 20 20 20 20 20 20 00 80 CE 00 4E 43 41 31 2D 2025-06-18 16:49:57 - 32 33 31 32 30 35 30 36 33 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:57 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:58 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:49:59 - RAM type: DDR5 2025-06-18 16:49:59 - SPD rev: 0x10 2025-06-18 16:49:59 - Module type: SODIMM 2025-06-18 16:49:59 - Size: 16384 MB 2025-06-18 16:49:59 - Banks x Rows x Columns x Bits: 32 x 16 x 10 x 32 2025-06-18 16:49:59 - Ranks: 1 2025-06-18 16:49:59 - SDRAM Device Width: 8 2025-06-18 16:49:59 - SDRAM Package Type: Monolithic SDRAM 2025-06-18 16:49:59 - Operable voltages: 1.1V 2025-06-18 16:49:59 - SDRAM Nominal Voltage, VDD: 1.1V 2025-06-18 16:49:59 - SDRAM Nominal Voltage, VDDQ: 1.1V 2025-06-18 16:49:59 - SDRAM Nominal Voltage, VPP: 1.8V 2025-06-18 16:49:59 - ECC: Yes 2025-06-18 16:49:59 - Minimum clock cycle time (ns): 0.357 2025-06-18 16:50:00 - Maximum clock cycle time (ns): 1.010 2025-06-18 16:50:00 - Maximum clock speed: 2800 MHz 2025-06-18 16:50:00 - Maximum module speed: 5600 MT/s (PC5-44800) 2025-06-18 16:50:00 - Supported CAS: 22 26 28 30 32 36 40 42 46 50 2025-06-18 16:50:00 - Minimum CAS latency time (tAA): 16.000 2025-06-18 16:50:00 - Minimum RAS to CAS delay time (tRCD): 16.000 2025-06-18 16:50:00 - Minimum row precharge time (tRP): 16.000 2025-06-18 16:50:00 - Minimum active to precharge time (tRAS): 32.000 2025-06-18 16:50:00 - Supported timing at highest clock speed (2800 MHz) : 46-45-45-90 2025-06-18 16:50:00 - SPD present: Yes 2025-06-18 16:50:00 - SPD device type: SPD5118 2025-06-18 16:50:01 - PMIC 0 present: Yes 2025-06-18 16:50:01 - PMIC 0 device type: PMIC5100 2025-06-18 16:50:01 - PMIC 1 present: No 2025-06-18 16:50:01 - PMIC 1 device type: PMIC5000 2025-06-18 16:50:01 - PMIC 2 present: No 2025-06-18 16:50:01 - PMIC 2 device type: PMIC5000 2025-06-18 16:50:01 - Thermal Sensor 0 present: No 2025-06-18 16:50:01 - Thermal Sensor 1 present: No 2025-06-18 16:50:01 - Thermal Sensors device type: TS5111 2025-06-18 16:50:01 - Module Height (mm): 29 - 30 2025-06-18 16:50:01 - Module Thickness (mm): front 1-2 , back 0-1 2025-06-18 16:50:01 - Module reference card: Raw Card D Rev. 0 2025-06-18 16:50:01 - Rank Mix: Symmetrical 2025-06-18 16:50:01 - Number of Package Ranks per Sub-Channel: 1 2025-06-18 16:50:01 - Number of Sub-Channels per DIMM: 2 2025-06-18 16:50:01 - Bus width extension per Sub-Channel: 4 bits 2025-06-18 16:50:01 - Primary bus width per Sub-Channel: 32 bits 2025-06-18 16:50:01 - Module Manufacturer: Advantech Co Ltd (Bank: 11, ID: 0xC8) 2025-06-18 16:50:01 - Module manufacturing location: 0x02 2025-06-18 16:50:01 - Manufacturing Date: Year 2023 Week 49 2025-06-18 16:50:01 - Module serial number: 0x50630001 2025-06-18 16:50:01 - Module Part Number: SQR-SD5N16G5K6SEPB 2025-06-18 16:50:01 - Revision Code: 0x00 2025-06-18 16:50:01 - DRAM Manufacturer: Samsung (Bank: 1, ID: 0xCE) 2025-06-18 16:50:02 - DRAM Stepping: 0x00 2025-06-18 16:50:02 - Module Manufacturer's Specific Data raw bytes: 2025-06-18 16:50:02 - 4E 43 41 31 2D 32 33 31 32 30 35 30 36 33 00 00 2025-06-18 16:50:02 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:50:02 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:50:02 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:50:02 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2025-06-18 16:50:02 - 00 00 00 00 00 2025-06-18 16:50:02 - DIMM#0 (Channel -1, Slot -1) serial number: 50630001 2025-06-18 16:50:02 - Enumerating PCI bus... 2025-06-18 16:50:02 - Scanning PCI for devices: 2025-06-18 16:50:02 - VID:8086 DID:4650 Bus:00 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:05 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:02 - VID:8086 DID:460D Bus:00 Dev:01 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:05 HeaderType:81 [Intel Unknown] 2025-06-18 16:50:02 - VID:8086 DID:462D Bus:00 Dev:01 Fun:01 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:05 HeaderType:81 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:4690 Bus:00 Dev:02 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:0C HeaderType:00 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:464F Bus:00 Dev:08 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:05 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:467D Bus:00 Dev:0A Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:01 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AE0 Bus:00 Dev:14 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:80 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AA7 Bus:00 Dev:14 Fun:02 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AE8 Bus:00 Dev:16 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:80 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AEB Bus:00 Dev:16 Fun:03 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:80 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AE2 Bus:00 Dev:17 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AC0 Bus:00 Dev:1B Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:81 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AC4 Bus:00 Dev:1B Fun:04 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:81 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AB8 Bus:00 Dev:1C Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:81 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7ABD Bus:00 Dev:1C Fun:05 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:81 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7A90 Bus:00 Dev:1F Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:80 [Intel Unknown] 2025-06-18 16:50:03 - VID:8086 DID:7AD0 Bus:00 Dev:1F Fun:03 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:03 - {00:1F:04} SMBus Configuration Registers: 2025-06-18 16:50:03 - 00: 7AA38086 02800001 0C050011 00000000 2025-06-18 16:50:03 - 10: 01120004 00000060 00000000 00000000 2025-06-18 16:50:03 - 20: 0000EFA1 00000000 00000000 72708086 2025-06-18 16:50:03 - 30: 00000000 00000000 00000000 000003FF 2025-06-18 16:50:03 - 40: 00000011 00000000 00000000 00000000 2025-06-18 16:50:03 - 50: 00000401 00000101 00000000 00000000 2025-06-18 16:50:04 - 60: 00050504 0A0A0000 00000000 00000000 2025-06-18 16:50:04 - 70: 00000000 00000000 00000000 00000000 2025-06-18 16:50:04 - 80: 00000024 00000000 00000000 00000000 2025-06-18 16:50:04 - 90: 01210000 00000C00 0120001F 00000E00 2025-06-18 16:50:04 - A0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:04 - B0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:04 - C0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:04 - D0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:04 - E0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:04 - F0: 00000000 00000000 00130000 00000000 2025-06-18 16:50:04 - VID:8086 DID:7AA3 Bus:00 Dev:1F Fun:04 IO Add:EFA0 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:00 [Intel Alder Lake-S SMBus] 2025-06-18 16:50:04 - VID:8086 DID:7AA4 Bus:00 Dev:1F Fun:05 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:04 - VID:8086 DID:1A1C Bus:00 Dev:1F Fun:06 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:11 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:04 - VID:1987 DID:5013 Bus:02 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:01 HeaderType:00 [Unknown Unknown] 2025-06-18 16:50:04 - VID:12D8 DID:2608 Bus:04 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:00 HeaderType:01 [Unknown Unknown] 2025-06-18 16:50:05 - VID:12D8 DID:2608 Bus:05 Dev:01 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:00 HeaderType:01 [Unknown Unknown] 2025-06-18 16:50:05 - VID:12D8 DID:2608 Bus:05 Dev:02 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:00 HeaderType:01 [Unknown Unknown] 2025-06-18 16:50:05 - VID:12D8 DID:2608 Bus:05 Dev:03 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:00 HeaderType:01 [Unknown Unknown] 2025-06-18 16:50:05 - VID:12D8 DID:2608 Bus:05 Dev:04 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:00 HeaderType:01 [Unknown Unknown] 2025-06-18 16:50:05 - VID:8086 DID:1533 Bus:06 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:03 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:05 - VID:8086 DID:1533 Bus:07 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:03 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:05 - VID:8086 DID:1533 Bus:08 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:03 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:05 - VID:8086 DID:1533 Bus:09 Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:03 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:05 - VID:8086 DID:125B Bus:0B Dev:00 Fun:00 IO Add:0000 IO (2) Add:0000 MMIO Add:0 PCI Add:{00:00:00:0000} Rev:04 HeaderType:00 [Intel Unknown] 2025-06-18 16:50:05 - Finished searching PCI for SMBus Controller 2025-06-18 16:50:05 - Getting memory TSOD info 2025-06-18 16:50:05 - Attempting to enable any disabled TSOD controllers... 2025-06-18 16:50:05 - Attempting to enable SMBUS: 2025-06-18 16:50:05 - Searching PCI for TSOD Controller 2025-06-18 16:50:05 - {00:1F:04} SMBus Configuration Registers: 2025-06-18 16:50:05 - 00: 7AA38086 02800001 0C050011 00000000 2025-06-18 16:50:05 - 10: 01120004 00000060 00000000 00000000 2025-06-18 16:50:05 - 20: 0000EFA1 00000000 00000000 72708086 2025-06-18 16:50:06 - 30: 00000000 00000000 00000000 000003FF 2025-06-18 16:50:06 - 40: 00000011 00000000 00000000 00000000 2025-06-18 16:50:06 - 50: 00000401 00000101 00000000 00000000 2025-06-18 16:50:06 - 60: 00050504 0A0A0000 00000000 00000000 2025-06-18 16:50:06 - 70: 00000000 00000000 00000000 00000000 2025-06-18 16:50:06 - 80: 00000024 00000000 00000000 00000000 2025-06-18 16:50:06 - 90: 01210000 00000C00 0120001F 00000E00 2025-06-18 16:50:06 - A0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:06 - B0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:06 - C0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:06 - D0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:06 - E0: 00000000 00000000 00000000 00000000 2025-06-18 16:50:06 - F0: 00000000 00000000 00130000 00000000 2025-06-18 16:50:06 - Found TSOD device: VID:8086 DID:7AA3 Bus:00 Dev:1F Fun:04 IO Add:EFA0 IO (2) Add:0000 MMIO Add:0 Rev:11 [Intel Alder Lake-S SMBus] 2025-06-18 16:50:06 - Finished searching PCI for SMBus Controller 2025-06-18 16:50:06 - Expanding TSOD info array (0 => 16) 2025-06-18 16:50:06 - Getting memory SMBIOS info 2025-06-18 16:50:07 - Getting SMBIOS Memory Device info... 2025-06-18 16:50:07 - Found 2 Memory Devices 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct 0 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct Get strings (FormattedLen=92, iTotalLen=8A) 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct: String area len=46 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct: parsing v2.3+ strings 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct: parsing v3.2+ strings 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct end 2025-06-18 16:50:07 - [Slot 0] TotalWidth: 0, DataWidth: 0, Size: 0, FormFactor: 2, DeviceSet: 0, MemoryType: 2, Speed: 0, Attributes: 0, ExtendedSize: 0, ConfiguredMemoryClockSpeed: 0, MinimumVoltage: 0, MaximumVoltage: 0, ConfiguredVoltage: 0 2025-06-18 16:50:07 - [Slot 0] DeviceLocator: Controller0-ChannelA-DIMM0, BankLocator: BANK 0, Manufacturer: , S/N: , AssetTag: , PartNumber: 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct 1 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct Get strings (FormattedLen=92, iTotalLen=B9) 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct: String area len=93 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct: parsing v2.3+ strings 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct: parsing v3.2+ strings 2025-06-18 16:50:07 - DEBUG: Get SMB mem device Struct end 2025-06-18 16:50:07 - [Slot 1] TotalWidth: 80, DataWidth: 64, Size: 16384, FormFactor: 13, DeviceSet: 0, MemoryType: 34, Speed: 5600, Attributes: 1, ExtendedSize: 0, ConfiguredMemoryClockSpeed: 4800, MinimumVoltage: 1100, MaximumVoltage: 1100, ConfiguredVoltage: 1100 2025-06-18 16:50:08 - [Slot 1] DeviceLocator: Controller1-ChannelA-DIMM0, BankLocator: BANK 0, Manufacturer: Advantech Co Ltd, S/N: 50630001, AssetTag: 9876543210, PartNumber: SQR-SD5N16G5K6SEPB 2025-06-18 16:50:08 - Number of non-empty SMBIOS memory devices found: 1 2025-06-18 16:50:08 - [SPD 0] Comparing SMBIOS S/N (50630001) with SPD S/N (50630001) 2025-06-18 16:50:08 - [SPD 0] SMBIOS S/N = 50630001 2025-06-18 16:50:08 - [SPD 0] Found match with SMBIOS 1 2025-06-18 16:50:08 - Console size = 80 x 25 2025-06-18 16:50:08 - Checking for graphics mode support 2025-06-18 16:50:08 - Graphics mode available 2025-06-18 16:50:08 - Enabling graphics mode 2025-06-18 16:50:08 - Get screen size 2025-06-18 16:50:08 - Current screen size: 800 x 600 2025-06-18 16:50:08 - Screen resolution is too low (800 x 600). Attempting to set new screen size. 2025-06-18 16:50:08 - Found eligible graphics mode: 0 [1920 x 1200] 2025-06-18 16:50:08 - Found eligible graphics mode: 3 [1024 x 768] 2025-06-18 16:50:08 - Found eligible graphics mode: 4 [1280 x 1024] 2025-06-18 16:50:08 - Found eligible graphics mode: 5 [1600 x 1200] 2025-06-18 16:50:08 - Found eligible graphics mode: 6 [1920 x 1080] 2025-06-18 16:50:08 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:50:08 - Successfully set graphics mode to: 3 2025-06-18 16:50:09 - New screen size = 1024 x 768 2025-06-18 16:50:09 - Screen size = 1024 x 768 2025-06-18 16:50:09 - Char width=8 height=19 2025-06-18 16:50:09 - Loading images 2025-06-18 16:50:09 - Show splash screen 2025-06-18 16:50:09 - Splash screen start time: 474591099651 (clk=2953670, ConIn=40F85200, WaitForKey=3D084B18) 2025-06-18 16:50:19 - Splash screen countdown timer expired 2025-06-18 16:50:20 - Exit splash screen 2025-06-18 16:50:20 - Initializing spin lock (Align=64) 2025-06-18 16:50:20 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:20 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:20 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:20 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:20 - *** TEST SESSION - 2025-06-18 16:50:20 *** 2025-06-18 16:50:20 - CPU selection mode = 1 2025-06-18 16:50:20 - MTRR Settings: 2025-06-18 16:50:20 - ============= 2025-06-18 16:50:20 - MTRR Default Type: 0000000000000C00 2025-06-18 16:50:20 - Fixed MTRR[00] : 0606060606060606 2025-06-18 16:50:20 - Fixed MTRR[01] : 0606060606060606 2025-06-18 16:50:20 - Fixed MTRR[02] : 0000000000000000 2025-06-18 16:50:20 - Fixed MTRR[03] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[04] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[05] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[06] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[07] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[08] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[09] : 0505050505050505 2025-06-18 16:50:20 - Fixed MTRR[10] : 0505050505050505 2025-06-18 16:50:21 - Variable MTRR[00]: Base=0000000000000006 Mask=00003FF800000800 2025-06-18 16:50:22 - Variable MTRR[01]: Base=000000004C000000 Mask=00003FFFFC000800 2025-06-18 16:50:22 - Variable MTRR[02]: Base=0000000050000000 Mask=00003FFFF0000800 2025-06-18 16:50:22 - Variable MTRR[03]: Base=0000000060000000 Mask=00003FFFE0000800 2025-06-18 16:50:22 - Variable MTRR[04]: Base=0000000080000000 Mask=00003FFF80000800 2025-06-18 16:50:22 - 2025-06-18 16:50:22 - Available Variable MTRR : 8 2025-06-18 16:50:22 - 2025-06-18 16:50:22 - Memory Ranges: 2025-06-18 16:50:22 - ==================================== 2025-06-18 16:50:22 - WB:0000000000000000-000000000009FFFF 2025-06-18 16:50:22 - UC:00000000000A0000-00000000000BFFFF 2025-06-18 16:50:22 - WP:00000000000C0000-00000000000FFFFF 2025-06-18 16:50:22 - WB:0000000000100000-000000004BFFFFFF 2025-06-18 16:50:22 - UC:000000004C000000-00000000FFFFFFFF 2025-06-18 16:50:22 - WB:0000000100000000-00000007FFFFFFFF 2025-06-18 16:50:22 - UC:0000000800000000-00003FFFFFFFFFFF 2025-06-18 16:50:22 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:50:22 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:50:22 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:50:22 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:50:22 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:50:22 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:50:22 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:50:22 - ReadMemoryRanges - Available Pages = 4090129 2025-06-18 16:50:22 - Locking all memory ranges first... 2025-06-18 16:50:22 - Skipping memory range 0x0 - 0x9E000 (632KB). Range too small. 2025-06-18 16:50:22 - Memory range locked: 0x100000 - 0x20080000 (15836740KB of available memory left) 2025-06-18 16:50:22 - Memory range locked: 0x20081000 - 0x321D8000 (15540456KB of available memory left) 2025-06-18 16:50:22 - Memory range locked: 0x32258000 - 0x36048000 (15477032KB of available memory left) 2025-06-18 16:50:22 - Skipping memory range 0x36288000 - 0x36921000 (6756KB). Range too small. 2025-06-18 16:50:22 - Skipping memory range 0x36AD6000 - 0x36B09000 (204KB). Range too small. 2025-06-18 16:50:22 - Skipping memory range 0x36B1A000 - 0x36B3B000 (132KB). Range too small. 2025-06-18 16:50:22 - Skipping memory range 0x36B53000 - 0x36B5A000 (28KB). Range too small. 2025-06-18 16:50:22 - Skipping memory range 0x36B7E000 - 0x36B81000 (12KB). Range too small. 2025-06-18 16:50:23 - Skipping memory range 0x403D7000 - 0x40A8C000 (6868KB). Range too small. 2025-06-18 16:50:23 - Remaining memory is less than 16MB. Reducing memory range from 0x100000000 - 0x4AFC00000 (15462400KB) => 0x100000000 - 0x4AFA4A000 (15460648KB) 2025-06-18 16:50:23 - Memory range locked: 0x100000000 - 0x4AFA4A000 (16384KB of available memory left) 2025-06-18 16:50:24 - All memory ranges successfully locked 2025-06-18 16:50:24 - Starting pass #1 (of 4) 2025-06-18 16:50:24 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:50:24 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:50:24 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:50:24 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:50:24 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:50:24 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:50:24 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:50:24 - Current mem timings: 4788 MT/s (40-39-39-76) 2025-06-18 16:50:24 - DIMM0 temperature: 34.500C 2025-06-18 16:50:24 - Current CPU temperature: 56C 2025-06-18 16:50:24 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:24 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:24 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:24 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:24 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:24 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:24 - Running test #0 (Test 0 [Address test, walking ones, 1 CPU]) 2025-06-18 16:50:24 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:50:24 - MtSupportRunAllTests - Start time: 4081 ms 2025-06-18 16:50:24 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:50:25 - MtSupportRunAllTests - Test execution time: 0.301s (Test 0 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:50:25 - Running test #1 (Test 1 [Address test, own address, 1 CPU]) 2025-06-18 16:50:25 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:50:25 - MtSupportRunAllTests - Start time: 5080 ms 2025-06-18 16:50:25 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:50:25 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:25 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:25 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:25 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:25 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:25 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:26 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:27 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:27 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:27 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:27 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:27 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:28 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:29 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:29 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:29 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:29 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:29 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:30 - MtSupportRunAllTests - Test execution time: 4.337s (Test 1 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:50:30 - Running test #2 (Test 2 [Address test, own address]) 2025-06-18 16:50:30 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:50:30 - MtSupportRunAllTests - Start time: 10132 ms 2025-06-18 16:50:30 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:50:30 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:30 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:30 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:30 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:30 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:30 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:32 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:32 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:32 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:32 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:32 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:32 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:34 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:34 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:34 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:34 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:34 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:34 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:35 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:36 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:36 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:36 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:36 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:36 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:37 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:38 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:38 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:38 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:38 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:38 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:38 - MtSupportRunAllTests - Test execution time: 7.906s (Test 2 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:50:38 - Running test #3 (Test 3 [Moving inversions, ones & zeroes]) 2025-06-18 16:50:38 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:50:38 - MtSupportRunAllTests - Start time: 18169 ms 2025-06-18 16:50:38 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:50:39 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:40 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:40 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:40 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:40 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:40 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:41 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:41 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:42 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:42 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:42 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:42 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:43 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:43 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:43 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:43 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:43 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:44 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:45 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:46 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:46 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:46 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:46 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:46 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:47 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:48 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:48 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:48 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:48 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:48 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:49 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:50 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:50 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:50 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:50 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:50 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:51 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:52 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:52 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:52 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:52 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:52 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:53 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:54 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:54 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:54 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:54 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:54 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:55 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:55 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:56 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:56 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:56 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:56 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:57 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:57 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:57 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:57 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:58 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:58 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:59 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:50:59 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:50:59 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:50:59 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:50:59 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:50:59 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:00 - MtSupportRunAllTests - Test execution time: 20.801s (Test 3 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:51:00 - Running test #4 (Test 4 [Moving inversions, 8-bit pattern]) 2025-06-18 16:51:00 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:51:00 - MtSupportRunAllTests - Start time: 39083 ms 2025-06-18 16:51:00 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:51:01 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:01 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:01 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:01 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:02 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:02 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:03 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:03 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:04 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:04 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:04 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:04 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:05 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:06 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:06 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:06 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:06 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:06 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:07 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:08 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:08 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:08 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:08 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:08 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:09 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:10 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:10 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:10 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:10 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:10 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:11 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:11 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:11 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:12 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:12 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:12 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:13 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:13 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:13 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:13 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:13 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:14 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:15 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:15 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:15 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:15 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:15 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:15 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:24 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:51:24 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:51:25 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:25 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:25 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:51:25 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:51:25 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:51:25 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:51:25 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:51:25 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:25 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:25 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:51:25 - poll_timings_alderlake - BCLK_FREQ=0000000000018593 2025-06-18 16:51:25 - get_mem_ctrl_timings - [0-0-0] 4786 MT/s (40-39-39-76) 2025-06-18 16:51:25 - Current mem timings: 4786 MT/s (40-39-39-76) 2025-06-18 16:51:25 - DIMM0 temperature: 40.000C 2025-06-18 16:51:25 - Current CPU temperature: 58C 2025-06-18 16:51:25 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:51:25 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:51:25 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:25 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:51:25 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:51:26 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:51:26 - MtSupportRunAllTests - Test execution time: 26.197s (Test 4 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:51:26 - Test aborted 2025-06-18 16:51:26 - Cleanup - Unlocking all memory ranges... 2025-06-18 16:51:26 - All memory ranges successfully unlocked 2025-06-18 16:51:28 - Test result: INCOMPLETE PASS (Errors: 0) 2025-06-18 16:51:29 - Supported motherboard ("Compact Server 2.0") and chipset ("Intel Alder Lake") detected. Display individual DIMM results. 2025-06-18 16:51:30 - Enabling graphics mode 2025-06-18 16:51:30 - Get screen size 2025-06-18 16:51:30 - Current screen size: 800 x 600 2025-06-18 16:51:30 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:51:30 - Successfully set graphics mode to: 3 2025-06-18 16:51:30 - New screen size = 1024 x 768 2025-06-18 16:51:30 - [DIMM 0] Errs=0 Ranks=0 Side=0 Chips=0 2025-06-18 16:51:30 - [SO-DIMM 1] Errs=0 Ranks=1 Side=0 Chips=8 2025-06-18 16:51:40 - Display test result summary 2025-06-18 16:51:51 - Saving test report to MemTest86-Report-20250618-165020_641259.html 2025-06-18 16:51:52 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:51:52 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:51:52 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:52 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:52 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:51:52 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:51:52 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:51:52 - Test report was successfully saved 2025-06-18 16:51:52 - Enabling graphics mode 2025-06-18 16:51:52 - Get screen size 2025-06-18 16:51:52 - Current screen size: 800 x 600 2025-06-18 16:51:52 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:51:52 - Successfully set graphics mode to: 3 2025-06-18 16:51:53 - New screen size = 1024 x 768 2025-06-18 16:51:53 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:51:53 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:51:53 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:53 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:51:53 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:51:53 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:51:53 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:52:10 - Initializing spin lock (Align=64) 2025-06-18 16:52:11 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:11 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:11 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:11 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:11 - *** TEST SESSION - 2025-06-18 16:52:11 *** 2025-06-18 16:52:11 - CPU selection mode = 1 2025-06-18 16:52:11 - MTRR Settings: 2025-06-18 16:52:11 - ============= 2025-06-18 16:52:11 - MTRR Default Type: 0000000000000C00 2025-06-18 16:52:11 - Fixed MTRR[00] : 0606060606060606 2025-06-18 16:52:11 - Fixed MTRR[01] : 0606060606060606 2025-06-18 16:52:11 - Fixed MTRR[02] : 0000000000000000 2025-06-18 16:52:11 - Fixed MTRR[03] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[04] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[05] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[06] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[07] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[08] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[09] : 0505050505050505 2025-06-18 16:52:11 - Fixed MTRR[10] : 0505050505050505 2025-06-18 16:52:11 - Variable MTRR[00]: Base=0000000000000006 Mask=00003FF800000800 2025-06-18 16:52:12 - Variable MTRR[01]: Base=000000004C000000 Mask=00003FFFFC000800 2025-06-18 16:52:12 - Variable MTRR[02]: Base=0000000050000000 Mask=00003FFFF0000800 2025-06-18 16:52:12 - Variable MTRR[03]: Base=0000000060000000 Mask=00003FFFE0000800 2025-06-18 16:52:12 - Variable MTRR[04]: Base=0000000080000000 Mask=00003FFF80000800 2025-06-18 16:52:12 - 2025-06-18 16:52:12 - Available Variable MTRR : 8 2025-06-18 16:52:13 - 2025-06-18 16:52:13 - Memory Ranges: 2025-06-18 16:52:13 - ==================================== 2025-06-18 16:52:13 - WB:0000000000000000-000000000009FFFF 2025-06-18 16:52:13 - UC:00000000000A0000-00000000000BFFFF 2025-06-18 16:52:13 - WP:00000000000C0000-00000000000FFFFF 2025-06-18 16:52:13 - WB:0000000000100000-000000004BFFFFFF 2025-06-18 16:52:13 - UC:000000004C000000-00000000FFFFFFFF 2025-06-18 16:52:13 - WB:0000000100000000-00000007FFFFFFFF 2025-06-18 16:52:13 - UC:0000000800000000-00003FFFFFFFFFFF 2025-06-18 16:52:13 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:52:13 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:52:13 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:52:13 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:52:13 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:52:13 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:52:13 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:52:13 - ReadMemoryRanges - Available Pages = 4090118 2025-06-18 16:52:13 - Locking all memory ranges first... 2025-06-18 16:52:13 - Skipping memory range 0x0 - 0x9E000 (632KB). Range too small. 2025-06-18 16:52:13 - Memory range locked: 0x100000 - 0x20080000 (15836696KB of available memory left) 2025-06-18 16:52:13 - Memory range locked: 0x20081000 - 0x321D8000 (15540412KB of available memory left) 2025-06-18 16:52:13 - Memory range locked: 0x32258000 - 0x36048000 (15476988KB of available memory left) 2025-06-18 16:52:13 - Skipping memory range 0x36288000 - 0x36921000 (6756KB). Range too small. 2025-06-18 16:52:13 - Skipping memory range 0x36AD6000 - 0x36AFE000 (160KB). Range too small. 2025-06-18 16:52:13 - Skipping memory range 0x36B1A000 - 0x36B3B000 (132KB). Range too small. 2025-06-18 16:52:13 - Skipping memory range 0x36B53000 - 0x36B5A000 (28KB). Range too small. 2025-06-18 16:52:13 - Skipping memory range 0x36B7E000 - 0x36B81000 (12KB). Range too small. 2025-06-18 16:52:13 - Skipping memory range 0x403D7000 - 0x40A8C000 (6868KB). Range too small. 2025-06-18 16:52:13 - Remaining memory is less than 16MB. Reducing memory range from 0x100000000 - 0x4AFC00000 (15462400KB) => 0x100000000 - 0x4AFA3F000 (15460604KB) 2025-06-18 16:52:13 - Memory range locked: 0x100000000 - 0x4AFA3F000 (16384KB of available memory left) 2025-06-18 16:52:14 - All memory ranges successfully locked 2025-06-18 16:52:14 - Starting pass #1 (of 4) 2025-06-18 16:52:14 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:52:14 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:52:15 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:52:15 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:52:15 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:52:15 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:52:15 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:52:15 - Current mem timings: 4788 MT/s (40-39-39-76) 2025-06-18 16:52:15 - DIMM0 temperature: 36.000C 2025-06-18 16:52:15 - Current CPU temperature: 58C 2025-06-18 16:52:15 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:15 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:15 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:15 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:15 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:15 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:15 - Running test #0 (Test 0 [Address test, walking ones, 1 CPU]) 2025-06-18 16:52:15 - MtSupportRunAllTests - Injecting ECC error 2025-06-18 16:52:15 - inject_alderlake - [MC0] ECC Addr Comp = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC0] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC0|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC0|Ch0] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC0|Ch0] new ECC_DEBUG = FFFFFFFB 2025-06-18 16:52:15 - inject_alderlake - [MC0|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC0|Ch1] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC0|Ch1] new ECC_DEBUG = FFFFFFFB 2025-06-18 16:52:15 - inject_alderlake - [MC1] ECC Addr Comp = 00000000 2025-06-18 16:52:15 - inject_alderlake - [MC1] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC1|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC1|Ch0] ECC_DEBUG = 00000C00 2025-06-18 16:52:15 - inject_alderlake - [MC1|Ch0] new ECC_DEBUG = 00000C03 2025-06-18 16:52:15 - inject_alderlake - [MC1|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:15 - inject_alderlake - [MC1|Ch1] ECC_DEBUG = 00000C00 2025-06-18 16:52:15 - inject_alderlake - [MC1|Ch1] new ECC_DEBUG = 00000C03 2025-06-18 16:52:15 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:52:16 - MtSupportRunAllTests - Start time: 5079 ms 2025-06-18 16:52:16 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:52:17 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:17 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:17 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:17 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:17 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:17 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:17 - MtSupportRunAllTests - Test execution time: 0.949s (Test 0 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:52:18 - MtSupportRunAllTests - Stopping ECC injection 2025-06-18 16:52:18 - inject_alderlake - [MC0] ECC Addr Comp = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC0] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC0|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC0|Ch0] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC0|Ch0] new ECC_DEBUG = FFFFFFF8 2025-06-18 16:52:18 - inject_alderlake - [MC0|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC0|Ch1] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC0|Ch1] new ECC_DEBUG = FFFFFFF8 2025-06-18 16:52:18 - inject_alderlake - [MC1] ECC Addr Comp = 00000000 2025-06-18 16:52:18 - inject_alderlake - [MC1] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC1|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC1|Ch0] ECC_DEBUG = 00000C00 2025-06-18 16:52:18 - inject_alderlake - [MC1|Ch0] new ECC_DEBUG = 00000C00 2025-06-18 16:52:18 - inject_alderlake - [MC1|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:18 - inject_alderlake - [MC1|Ch1] ECC_DEBUG = 00000C00 2025-06-18 16:52:18 - inject_alderlake - [MC1|Ch1] new ECC_DEBUG = 00000C00 2025-06-18 16:52:18 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:18 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:18 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:18 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:19 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:19 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:19 - Running test #1 (Test 1 [Address test, own address, 1 CPU]) 2025-06-18 16:52:19 - MtSupportRunAllTests - Injecting ECC error 2025-06-18 16:52:19 - inject_alderlake - [MC0] ECC Addr Comp = FFFFFFFF 2025-06-18 16:52:19 - inject_alderlake - [MC0] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:19 - inject_alderlake - [MC0|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:19 - inject_alderlake - [MC0|Ch0] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:19 - inject_alderlake - [MC0|Ch0] new ECC_DEBUG = FFFFFFFB 2025-06-18 16:52:19 - inject_alderlake - [MC0|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:20 - inject_alderlake - [MC0|Ch1] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:20 - inject_alderlake - [MC0|Ch1] new ECC_DEBUG = FFFFFFFB 2025-06-18 16:52:20 - inject_alderlake - [MC1] ECC Addr Comp = 00000000 2025-06-18 16:52:20 - inject_alderlake - [MC1] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:20 - inject_alderlake - [MC1|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:20 - inject_alderlake - [MC1|Ch0] ECC_DEBUG = 00000C00 2025-06-18 16:52:20 - inject_alderlake - [MC1|Ch0] new ECC_DEBUG = 00000C03 2025-06-18 16:52:20 - inject_alderlake - [MC1|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:20 - inject_alderlake - [MC1|Ch1] ECC_DEBUG = 00000C00 2025-06-18 16:52:20 - inject_alderlake - [MC1|Ch1] new ECC_DEBUG = 00000C03 2025-06-18 16:52:20 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:52:20 - MtSupportRunAllTests - Start time: 8889 ms 2025-06-18 16:52:20 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:52:20 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:20 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:20 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:20 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:20 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:20 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:21 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:22 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:22 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:22 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:22 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:22 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:23 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:24 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:24 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:24 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:24 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:24 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:24 - MtSupportRunAllTests - Test execution time: 4.310s (Test 1 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:52:25 - MtSupportRunAllTests - Stopping ECC injection 2025-06-18 16:52:25 - inject_alderlake - [MC0] ECC Addr Comp = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC0] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC0|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC0|Ch0] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC0|Ch0] new ECC_DEBUG = FFFFFFF8 2025-06-18 16:52:25 - inject_alderlake - [MC0|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC0|Ch1] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC0|Ch1] new ECC_DEBUG = FFFFFFF8 2025-06-18 16:52:25 - inject_alderlake - [MC1] ECC Addr Comp = 00000000 2025-06-18 16:52:25 - inject_alderlake - [MC1] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC1|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:25 - inject_alderlake - [MC1|Ch0] ECC_DEBUG = 00000C00 2025-06-18 16:52:25 - inject_alderlake - [MC1|Ch0] new ECC_DEBUG = 00000C00 2025-06-18 16:52:26 - inject_alderlake - [MC1|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:26 - inject_alderlake - [MC1|Ch1] ECC_DEBUG = 00000C00 2025-06-18 16:52:26 - inject_alderlake - [MC1|Ch1] new ECC_DEBUG = 00000C00 2025-06-18 16:52:26 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:26 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:26 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:26 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:26 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:27 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:27 - Running test #2 (Test 2 [Address test, own address]) 2025-06-18 16:52:27 - MtSupportRunAllTests - Injecting ECC error 2025-06-18 16:52:27 - inject_alderlake - [MC0] ECC Addr Comp = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC0] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC0|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC0|Ch0] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC0|Ch0] new ECC_DEBUG = FFFFFFFB 2025-06-18 16:52:27 - inject_alderlake - [MC0|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC0|Ch1] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC0|Ch1] new ECC_DEBUG = FFFFFFFB 2025-06-18 16:52:27 - inject_alderlake - [MC1] ECC Addr Comp = 00000000 2025-06-18 16:52:27 - inject_alderlake - [MC1] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC1|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC1|Ch0] ECC_DEBUG = 00000C00 2025-06-18 16:52:27 - inject_alderlake - [MC1|Ch0] new ECC_DEBUG = 00000C03 2025-06-18 16:52:27 - inject_alderlake - [MC1|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:27 - inject_alderlake - [MC1|Ch1] ECC_DEBUG = 00000C00 2025-06-18 16:52:27 - inject_alderlake - [MC1|Ch1] new ECC_DEBUG = 00000C03 2025-06-18 16:52:27 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:52:27 - MtSupportRunAllTests - Start time: 16068 ms 2025-06-18 16:52:27 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:52:28 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:28 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:28 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:28 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:28 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:28 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:29 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:30 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:30 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:30 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:30 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:30 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:31 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:32 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:32 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:32 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:32 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:32 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:37 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:52:37 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:52:37 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:52:37 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:52:37 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:52:37 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:52:37 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:52:37 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:52:37 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:52:37 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:37 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:52:37 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:52:37 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:52:37 - MtSupportRunAllTests - Test execution time: 10.126s (Test 2 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:52:37 - MtSupportRunAllTests - Stopping ECC injection 2025-06-18 16:52:37 - inject_alderlake - [MC0] ECC Addr Comp = FFFFFFFF 2025-06-18 16:52:37 - inject_alderlake - [MC0] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:38 - inject_alderlake - [MC0|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:38 - inject_alderlake - [MC0|Ch0] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:38 - inject_alderlake - [MC0|Ch0] new ECC_DEBUG = FFFFFFF8 2025-06-18 16:52:38 - inject_alderlake - [MC0|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:38 - inject_alderlake - [MC0|Ch1] ECC_DEBUG = FFFFFFFF 2025-06-18 16:52:38 - inject_alderlake - [MC0|Ch1] new ECC_DEBUG = FFFFFFF8 2025-06-18 16:52:39 - inject_alderlake - [MC1] ECC Addr Comp = 00000000 2025-06-18 16:52:39 - inject_alderlake - [MC1] ECC Addr Mask = FFFFFFFF 2025-06-18 16:52:39 - inject_alderlake - [MC1|Ch0] ECC Inj count = FFFFFFFF 2025-06-18 16:52:39 - inject_alderlake - [MC1|Ch0] ECC_DEBUG = 00000C00 2025-06-18 16:52:39 - inject_alderlake - [MC1|Ch0] new ECC_DEBUG = 00000C00 2025-06-18 16:52:39 - inject_alderlake - [MC1|Ch1] ECC Inj count = FFFFFFFF 2025-06-18 16:52:39 - inject_alderlake - [MC1|Ch1] ECC_DEBUG = 00000C00 2025-06-18 16:52:39 - inject_alderlake - [MC1|Ch1] new ECC_DEBUG = 00000C00 2025-06-18 16:52:39 - Test aborted 2025-06-18 16:52:39 - Cleanup - Unlocking all memory ranges... 2025-06-18 16:52:39 - All memory ranges successfully unlocked 2025-06-18 16:52:41 - Test result: INCOMPLETE PASS (Errors: 0) 2025-06-18 16:52:46 - Supported motherboard ("Compact Server 2.0") and chipset ("Intel Alder Lake") detected. Display individual DIMM results. 2025-06-18 16:52:46 - Enabling graphics mode 2025-06-18 16:52:46 - Get screen size 2025-06-18 16:52:46 - Current screen size: 800 x 600 2025-06-18 16:52:46 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:52:46 - Successfully set graphics mode to: 3 2025-06-18 16:52:46 - New screen size = 1024 x 768 2025-06-18 16:52:46 - [DIMM 0] Errs=0 Ranks=0 Side=0 Chips=0 2025-06-18 16:52:46 - [SO-DIMM 1] Errs=0 Ranks=1 Side=0 Chips=8 2025-06-18 16:52:56 - Display test result summary 2025-06-18 16:53:00 - Enabling graphics mode 2025-06-18 16:53:00 - Get screen size 2025-06-18 16:53:00 - Current screen size: 800 x 600 2025-06-18 16:53:00 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:53:00 - Successfully set graphics mode to: 3 2025-06-18 16:53:00 - New screen size = 1024 x 768 2025-06-18 16:53:00 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:53:00 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:53:00 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:53:00 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:53:01 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:53:01 - poll_timings_alderlake - BCLK_FREQ=00000000000185C4 2025-06-18 16:53:01 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:53:11 - Initializing spin lock (Align=64) 2025-06-18 16:53:12 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:12 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:12 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:12 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:12 - *** TEST SESSION - 2025-06-18 16:53:12 *** 2025-06-18 16:53:12 - CPU selection mode = 1 2025-06-18 16:53:12 - MTRR Settings: 2025-06-18 16:53:12 - ============= 2025-06-18 16:53:12 - MTRR Default Type: 0000000000000C00 2025-06-18 16:53:12 - Fixed MTRR[00] : 0606060606060606 2025-06-18 16:53:12 - Fixed MTRR[01] : 0606060606060606 2025-06-18 16:53:12 - Fixed MTRR[02] : 0000000000000000 2025-06-18 16:53:12 - Fixed MTRR[03] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[04] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[05] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[06] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[07] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[08] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[09] : 0505050505050505 2025-06-18 16:53:12 - Fixed MTRR[10] : 0505050505050505 2025-06-18 16:53:13 - Variable MTRR[00]: Base=0000000000000006 Mask=00003FF800000800 2025-06-18 16:53:13 - Variable MTRR[01]: Base=000000004C000000 Mask=00003FFFFC000800 2025-06-18 16:53:13 - Variable MTRR[02]: Base=0000000050000000 Mask=00003FFFF0000800 2025-06-18 16:53:13 - Variable MTRR[03]: Base=0000000060000000 Mask=00003FFFE0000800 2025-06-18 16:53:13 - Variable MTRR[04]: Base=0000000080000000 Mask=00003FFF80000800 2025-06-18 16:53:14 - 2025-06-18 16:53:14 - Available Variable MTRR : 8 2025-06-18 16:53:14 - 2025-06-18 16:53:14 - Memory Ranges: 2025-06-18 16:53:14 - ==================================== 2025-06-18 16:53:14 - WB:0000000000000000-000000000009FFFF 2025-06-18 16:53:14 - UC:00000000000A0000-00000000000BFFFF 2025-06-18 16:53:14 - WP:00000000000C0000-00000000000FFFFF 2025-06-18 16:53:14 - WB:0000000000100000-000000004BFFFFFF 2025-06-18 16:53:14 - UC:000000004C000000-00000000FFFFFFFF 2025-06-18 16:53:14 - WB:0000000100000000-00000007FFFFFFFF 2025-06-18 16:53:14 - UC:0000000800000000-00003FFFFFFFFFFF 2025-06-18 16:53:14 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:53:14 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:53:14 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:53:14 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:53:14 - poll_timings_alderlake - SA_PERF_STATUS=001C594024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:53:14 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:53:14 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:53:14 - ReadMemoryRanges - Available Pages = 4090118 2025-06-18 16:53:14 - Locking all memory ranges first... 2025-06-18 16:53:14 - Skipping memory range 0x0 - 0x9E000 (632KB). Range too small. 2025-06-18 16:53:14 - Memory range locked: 0x100000 - 0x20080000 (15836696KB of available memory left) 2025-06-18 16:53:14 - Memory range locked: 0x20081000 - 0x321D8000 (15540412KB of available memory left) 2025-06-18 16:53:14 - Memory range locked: 0x32258000 - 0x36048000 (15476988KB of available memory left) 2025-06-18 16:53:14 - Skipping memory range 0x36288000 - 0x36921000 (6756KB). Range too small. 2025-06-18 16:53:14 - Skipping memory range 0x36AD6000 - 0x36AFE000 (160KB). Range too small. 2025-06-18 16:53:14 - Skipping memory range 0x36B1A000 - 0x36B3B000 (132KB). Range too small. 2025-06-18 16:53:14 - Skipping memory range 0x36B53000 - 0x36B5A000 (28KB). Range too small. 2025-06-18 16:53:14 - Skipping memory range 0x36B7E000 - 0x36B81000 (12KB). Range too small. 2025-06-18 16:53:14 - Skipping memory range 0x403D7000 - 0x40A8C000 (6868KB). Range too small. 2025-06-18 16:53:14 - Remaining memory is less than 16MB. Reducing memory range from 0x100000000 - 0x4AFC00000 (15462400KB) => 0x100000000 - 0x4AFA3F000 (15460604KB) 2025-06-18 16:53:14 - Memory range locked: 0x100000000 - 0x4AFA3F000 (16384KB of available memory left) 2025-06-18 16:53:15 - All memory ranges successfully locked 2025-06-18 16:53:16 - Starting pass #1 (of 4) 2025-06-18 16:53:16 - DIMM0 temperature: 35.500C 2025-06-18 16:53:16 - Current CPU temperature: 57C 2025-06-18 16:53:16 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:16 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:16 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:16 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:16 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:16 - [MEM ERROR - ECC Errors] Test: 0, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:16 - Running test #0 (Test 0 [Address test, walking ones, 1 CPU]) 2025-06-18 16:53:16 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:53:16 - MtSupportRunAllTests - Start time: 3867 ms 2025-06-18 16:53:16 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:53:16 - MtSupportRunAllTests - Test execution time: 0.306s (Test 0 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:53:17 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:17 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:17 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:17 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:17 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:17 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:17 - Running test #1 (Test 1 [Address test, own address, 1 CPU]) 2025-06-18 16:53:17 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:53:17 - MtSupportRunAllTests - Start time: 5057 ms 2025-06-18 16:53:17 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:53:18 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:19 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:19 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:19 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:19 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:19 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:20 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:21 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:21 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:21 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:21 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:21 - [MEM ERROR - ECC Errors] Test: 1, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:21 - MtSupportRunAllTests - Test execution time: 4.257s (Test 1 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:53:22 - Running test #2 (Test 2 [Address test, own address]) 2025-06-18 16:53:22 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:53:22 - MtSupportRunAllTests - Start time: 9938 ms 2025-06-18 16:53:22 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:53:22 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:22 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:22 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:22 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:22 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:22 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:23 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:24 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:24 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:24 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:24 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:24 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:25 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:26 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:26 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:26 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:26 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:26 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:27 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:28 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:28 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:28 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:28 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:29 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:30 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:30 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:30 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:30 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:30 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:30 - [MEM ERROR - ECC Errors] Test: 2, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:31 - MtSupportRunAllTests - Test execution time: 8.403s (Test 2 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:53:31 - Running test #3 (Test 3 [Moving inversions, ones & zeroes]) 2025-06-18 16:53:31 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:53:31 - MtSupportRunAllTests - Start time: 18455 ms 2025-06-18 16:53:31 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:53:32 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:32 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:32 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:32 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:32 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:32 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:33 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:34 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:34 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:34 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:34 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:34 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:35 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:36 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:36 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:36 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:36 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:36 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:37 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:38 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:38 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:38 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:38 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:38 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:39 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:40 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:40 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:40 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:40 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:40 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:41 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:42 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:42 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:42 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:42 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:42 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:43 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:43 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:44 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:44 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:44 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:44 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:45 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:45 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:45 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:46 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:46 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:46 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:47 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:47 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:47 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:47 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:47 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:48 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:49 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:49 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:49 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:49 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:49 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:49 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:51 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:51 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:51 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:51 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:51 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:51 - [MEM ERROR - ECC Errors] Test: 3, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:51 - MtSupportRunAllTests - Test execution time: 20.572s (Test 3 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:53:51 - Running test #4 (Test 4 [Moving inversions, 8-bit pattern]) 2025-06-18 16:53:52 - MtSupportRunAllTests - Setting random seed to 0x50415353 2025-06-18 16:53:52 - MtSupportRunAllTests - Start time: 39141 ms 2025-06-18 16:53:52 - Start memory range test (0x0 - 0x4AFC00000) 2025-06-18 16:53:53 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:53 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:53 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:53 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:53 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:54 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:55 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:55 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:55 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:55 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:56 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:56 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:57 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:58 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:53:58 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:58 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:53:58 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:53:58 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:53:59 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:53:59 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:00 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:00 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:00 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:00 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:01 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:01 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:01 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:02 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:02 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:02 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:03 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:03 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:03 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:03 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:03 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:04 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:05 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:05 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:05 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:05 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:05 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:05 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:07 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:07 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:07 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:07 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:07 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:07 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:09 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:09 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:09 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:09 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:09 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:09 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:11 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:11 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:11 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:11 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:11 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:11 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:13 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:13 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:13 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:13 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:13 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:13 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:15 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:15 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:15 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:15 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:15 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:15 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:16 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:54:17 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:54:17 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:54:17 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:54:17 - poll_timings_alderlake - SA_PERF_STATUS=001C444024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:54:17 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:54:17 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:54:17 - Current mem timings: 4788 MT/s (40-39-39-76) 2025-06-18 16:54:17 - DIMM0 temperature: 42.000C 2025-06-18 16:54:17 - Current CPU temperature: 60C 2025-06-18 16:54:17 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:17 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:17 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:17 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:17 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:17 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:19 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:19 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:19 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:19 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:19 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:19 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:21 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:21 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:21 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:21 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:21 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:21 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:23 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:23 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:23 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:23 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:23 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:23 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:25 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:25 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:25 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:25 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:25 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:25 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:27 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:27 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:27 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:27 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:27 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:27 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:29 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:29 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:29 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:29 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:29 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:29 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:31 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:31 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:31 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:31 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:31 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:31 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:32 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:33 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:33 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:33 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:33 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:33 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:34 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:35 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:35 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:35 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:35 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:35 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:36 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:37 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:37 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:37 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:37 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:37 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:38 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:39 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:39 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:39 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:39 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:39 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:40 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:41 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:41 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:41 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:41 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:41 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:42 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:43 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:43 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:43 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:43 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:43 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:44 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:45 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:45 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:45 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:45 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:45 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:46 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:47 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:47 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:47 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:47 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:47 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:48 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:49 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:49 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:49 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:49 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:49 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:50 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:51 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:51 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:51 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:51 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:51 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:52 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:53 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:53 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:53 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:53 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:53 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:54 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:55 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:55 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:55 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:55 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:55 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:56 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:57 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:57 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:57 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:57 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:57 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:58 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:54:59 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:54:59 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:54:59 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:54:59 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:54:59 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:00 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:55:01 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:55:01 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:01 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:55:01 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:55:01 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:02 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:55:03 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:55:03 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:03 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:55:03 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:55:03 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:08 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:55:08 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:55:08 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:55:08 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:55:08 - poll_timings_alderlake - SA_PERF_STATUS=001C444024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:55:08 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:55:08 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76) 2025-06-18 16:55:08 - [MC0] ERRLOG0[0]=FFFFFFFF 2025-06-18 16:55:08 - [MC0] ERRLOG1[0]=FFFFFFFF 2025-06-18 16:55:08 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:08 - [MC0] ERRLOG0[1]=FFFFFFFF 2025-06-18 16:55:08 - [MC0] ERRLOG1[1]=FFFFFFFF 2025-06-18 16:55:08 - [MEM ERROR - ECC Errors] Test: 4, (Chan,Slot,Rank,Bank,Row,Col): (0,0,3,7,3FFFF,7FF), ECC Corrected: no, Syndrome: 00FF, Channel/Slot: 0-0 2025-06-18 16:55:08 - MtSupportRunAllTests - Test execution time: 75.837s (Test 4 cumulative error count: 0, buffer full count: 0) 2025-06-18 16:55:08 - Test aborted 2025-06-18 16:55:08 - Cleanup - Unlocking all memory ranges... 2025-06-18 16:55:08 - All memory ranges successfully unlocked 2025-06-18 16:55:10 - Test result: INCOMPLETE PASS (Errors: 0) 2025-06-18 16:55:13 - Supported motherboard ("Compact Server 2.0") and chipset ("Intel Alder Lake") detected. Display individual DIMM results. 2025-06-18 16:55:13 - Enabling graphics mode 2025-06-18 16:55:13 - Get screen size 2025-06-18 16:55:13 - Current screen size: 800 x 600 2025-06-18 16:55:13 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:55:13 - Successfully set graphics mode to: 3 2025-06-18 16:55:13 - New screen size = 1024 x 768 2025-06-18 16:55:13 - [DIMM 0] Errs=0 Ranks=0 Side=0 Chips=0 2025-06-18 16:55:13 - [SO-DIMM 1] Errs=0 Ranks=1 Side=0 Chips=8 2025-06-18 16:55:14 - Display test result summary 2025-06-18 16:55:18 - Enabling graphics mode 2025-06-18 16:55:18 - Get screen size 2025-06-18 16:55:18 - Current screen size: 800 x 600 2025-06-18 16:55:18 - Setting graphics mode to: 3 [1024 x 768] 2025-06-18 16:55:18 - Successfully set graphics mode to: 3 2025-06-18 16:55:18 - New screen size = 1024 x 768 2025-06-18 16:55:18 - poll_timings_alderlake - [MC0] freq_mult=12 2025-06-18 16:55:18 - poll_timings_alderlake - [MC1] freq_mult=12 2025-06-18 16:55:18 - poll_timings_alderlake - MC_BIOS_REQ=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:55:18 - poll_timings_alderlake - MC_BIOS_DATA=79B81118 (MC_PLL_RATIO=24, MC_PLL_REF=1, GEAR=1) 2025-06-18 16:55:18 - poll_timings_alderlake - SA_PERF_STATUS=001C444024000463 (qclk_ratio=24, qclk_ref=1) 2025-06-18 16:55:18 - poll_timings_alderlake - BCLK_FREQ=00000000000185AC 2025-06-18 16:55:18 - get_mem_ctrl_timings - [0-0-0] 4788 MT/s (40-39-39-76)