Row Hammer pattern support LPDDR4/LPDDR3 platform?

[Jason]

Hi,
Does the hammer pattern support the Amber lake & ICE lake LPDDR3/4 platform?

[David (PassMark)]

Row hammer patterns were never perfect. In big part because Intel keeps the address memory mapping details secret.

So we aren't expecting it to be any worse or any better for Amber lake & ICE lake.

Some options are also configurable in the config file

HAMMERPAT=0x10101010
HAMMERMODE=SINGLE
HAMMERSTEP=0x10000