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When memtest86 is running, is cache memory tested just like the rest of RAM is tested? That is, are the patterns being written to cache? Or is cache memory only being used to cache reads and writes to the rest of memory? If cache memory is only being used as cache and not directly tested, are all three levels (L1, L2 and L3) being thoroughly tested by the tests to the rest of RAM? I looked through the test descriptions and it wasn't clear to me.
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The cache is not being tested directly and used as a cache for memory as it would during normal operation of the system. To do so would require putting the system in 'Cache-as-RAM' mode which would typically be done during DRAM initialization (http://en.wikipedia.org/wiki/Coreboot#Initializing_DRAM).
MemTest86 testing algorithms were designed for testing the memory subsystem as a whole, and in doing so indirectly testing its components (such as cache) in the datapath.
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