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We are pleased to announce the release of MemTest86 V7.5 which includes various enhancements/bug fixes.
Like previous releases since v5, the MemTest86 V7 image supports dual booting (UEFI/BIOS). On machines that don't support UEFI, the older V4 BIOS release of MemTest86 will be automatically booted. MemTest86 V7 has been digitally signed by Microsoft and therefore is compatible with Secure Boot.
In addition, we have introduced a new Site Edition of MemTest86 which supports scalable, diskless deployment to multiple PXE-enabled clients via network (PXE) booting. Site Edition covers an unlimited number of users within a single organization in a single country.
What new in V7.5 compared to V7.4
What new in V7.4 compared to V7.3
What new in V7.3 compared to V7.2
What new in V7.2 compared to V7.1
What new in V7.1 compared to V7.0
What new in V7.0 compared to V6.3.0
Download links
The Pro Edition can be purchased from our sales page, either as USB image files that users can install on their own USB flash drives, or an already-made USB flash drive with MemTest86 pre-installed.
The Site Edition can also be purchased from our sales page which includes all required files to install on your PXE server. The Site Edition package also contains the USB/CD Pro Edition image files should physical boot media be required.
The Free Edition can be downloaded directly from our download page:
http://www.memtest86.com/download.htm
Version History
The full 20 year release history of MemTest86 can be found here,
http://www.memtest86.com/support/ver_history.htm
Pro/Site Upgrades
If you purchased the Pro or Site Edition within 6 months of 2018/Feb/2, it is a free upgrade to V7.5 Pro/Site. Please login to your account to download the V7.5 Pro/Site package.
Like previous releases since v5, the MemTest86 V7 image supports dual booting (UEFI/BIOS). On machines that don't support UEFI, the older V4 BIOS release of MemTest86 will be automatically booted. MemTest86 V7 has been digitally signed by Microsoft and therefore is compatible with Secure Boot.
In addition, we have introduced a new Site Edition of MemTest86 which supports scalable, diskless deployment to multiple PXE-enabled clients via network (PXE) booting. Site Edition covers an unlimited number of users within a single organization in a single country.
What new in V7.5 compared to V7.4
- Added check for whether the number of errors exceed a maximum error count. If so, the tests are aborted. This can be configured via the configuration file parameter MAXERRCOUNT. By default the value is 10000
- Added support for Russian language
- Added new configuration file parameter EXITMODE for specifying whether to shutdown or reboot the system on exit
- Added support for reporting to Management Console (https://www.passmark.com/products/bitmgtconsole.htm) via XML messages over TFTP (Site Edition only). The status of MemTest86 is periodically reported to the management console
- Added new configuration file parameter TFTPSERVERIP for specifying a different TFTP server IP address for sending report files and reporting to the management console (Site Edition only)
- Added workaround for retrieving configuration files from TFTP servers that don't support the 'get file size' TFTP command (Site Edition only)
- Added workaround for Serva bug when overwriting a file on the TFTP server (Site Edition only)
- Fixed bug with generated HTML/XML files that require character escaping
- Added workaround when firmware EFI_GET_TIME function fails to retrieve the time correctly. A warning is also written to the log file
- Added new flag DISABLE_CONCTRL to blacklist for console control workarounds for older firmware
- Fixed 'ALL' BIOS versions not being parsed properly in blacklist
- Updated blacklist.cfg file with additional baseboards with known issues
- Added more robust detection of CPU hyperthreads
- Added ECC detection support for Intel Skylake-SP chipsets
- Added ECC detection/injection support for AMD Ryzen chipsets. Injecting is disable by default by AMD however, except on some engineering samples.
- Added warning message to log file when ECC injection is locked on Atom C2000 chipsets
- Fixed bug with ECC error reporting on Intel Xeon E3 chipsets
- Fixed CPU temperature not being shown for Intel Apollo Lake, Skylake-X and Broadwell-E chipsets
- Added preliminary support for retrieving CPU info for Intel Cannon Lake/Knights Mill chipsets
- Fixed bug with retrieving the number of boosted P-states in AMD chipsets
- Fixed CPU temperature not being read properly on AMD 15h (model >= 40h) chipsets
What new in V7.4 compared to V7.3
- Added new file blacklist.cfg that contains a list of baseboards that have known MemTest86 boot issues
- Added 'CONSOLEMODE' config file parameter for specifying the mode of the UEFI console. Setting the console mode determines the resolution of the console (with 0 being the minimum supported resolution of 80x25)
- Added 'BITFADESECS' config file parameter for specifying the sleep interval in the Bit Fade test (Test 10)
- Added language support for Catalan
- Updated ImageUSB to version 1.3
- Fixed 128-byte alignment issues in the random library
- Errors detected in Test 12 (128-bit Random Number Sequence Test) are now logged as 128-bit values
- HTML test report now includes if ECC polling was enabled
- Fixed text artifacts appearing in the testing screen due to the text being too long
- Fixed memory size being incorrectly reported due to including non-RAM memory ranges (eg. NVM, MMIO, Reserved)
- Fixed main menu screen being too small due to resolution being set too high
- Added preliminary ECC Injection support for Intel Xeon E5 chipsets
- Added preliminary ECC Injection support for Intel D-1500 chipsets
- Added ECC detection support for different variations of Intel Kaby Lake chipset
- Added support for retrieving AMD Ryzen CPU info, including base and turbo clock speeds
- Improved the performance and robustness of measuring CPU base/turbo speeds for AMD chipsets
- Updated JEDEC RAM manufacturer ID list
- Added reset mechanism for Intel ICH SMBus when timeout occurs while accessing SPD registers
- Fixed DDR4 SPD data not being read for PIIX4 SMBus controllers
What new in V7.3 compared to V7.2
- CPU cores that are identified as hyperthreads are now disabled by default, due to minimal performance benefits
- Fixed potential system hang caused by memory alignment issues when allocating 128-bit variables on the stack during the 128-bit random number sequence test (Test 12)
- Improved performance of the 128-bit random number sequence test (Test 12) by using SSE2 comparison intrinsics
- Improved performance of the row hammer test (Test 13) by increasing the default step size to 0x1000000 (16MB) for subsequent passes after the first pass. On the first pass, the default step size is 0x4000000 (64MB)
- Reduced test time of the row hammer test (Test 13) by using only a single offset bit to determine the row address pair, rather than cycle through all possible offset bits.
- Added 'ENABLEHT' config file parameter to enable/disable CPU cores identified as hyperthreads
- Added 'HAMMERSTEP' config file parameter to specify the step size for the next row pair to hammer in the row hammer test (Test 13). Increasing the step size reduces the memory test coverage, but will also decrease the test time. By default, the step size is 0x1000000 (16MB)
- Added several known baseboards to to a 'blacklist' of boards that have known issues when running in multiprocessor mode. If a blacklisted baseboard is detected, the Multiprocessor test is skipped during startup and the CPU selection mode is set to single.
- Fixed triggering of ECC error injection on Intel Skylake (Xeon E3 v5) chipset
- Added ECC detection and injection support for Intel KabyLake (Xeon E3 v6 family) chipsets
- Added ECC detection and injection support for Apollo Lake SoC (Atom E3900 Series) chipsets
- Added support for retrieving RAM SPD data on Intel Skylake-E chipsets
- Fixed issue with the test elapsed time having strange values when running in round robin or sequential CPU mode due to the timestamp counter not being synchronized on the CPU cores
What new in V7.2 compared to V7.1
- Language support for Italian
- Added ECC detection support for Broadwell-H chipsets
- Added ECC injection support for Broadwell-H chipsets
- Added ECC detection support for AMD Merlin Falcon
- Added fix for certain Intel Xeon E5 platforms that are unable to access the ECC and SMBus registers
- TSOD polling is now temporarily disabled on Intel E5 v3 platforms when reading SPD bytes. Previously, this caused invalid bytes to appear in the SPD data.
- Added sanity check for invalid characters in the SPD part number string
- Updated JEDEC ID manufacture names
- Fixed crash when the number of processors is greater than the max supported (120)
- Added SMBIOS system, baseboard and BIOS info to MemTest86 reports
- Reduced the number of decimal points when displaying memory/cache speeds
- Added workaround for certain UEFI firmware when setting console resolution
- Report file name is now prepended with the baseboard serial number when running MemTest86 Site Edition in order to distinguish from reports from other machines
- Added "Mac-F42C88C8" to a blacklist of known unsupported baseboard/EFI firmwares. When a blacklisted baseboard/EFI firmware is detected, a warning message is displayed.
- Updated to latest UDK + compiler tools
- Various system info related updates/fixes (CPU)
What new in V7.1 compared to V7.0
- Fixed a bug in measuring CPU clock speed using HPET which could skew the clock speed results to unreasonable values. This may have caused issues during startup including extremely long loading times.
- Added fallback mechanism to use the legacy PIT to measure the clock speed if the measured CPU clock speed using HPET is unreasonable.
- Disabled code optimization for Test 12 due to reported freeze when running in parallel mode
- Fixed CPU selection mode not being set according to the results of the multiprocessor test during startup
- When switching to the next target CPU in Sequential/Round Robin mode, attempt to reset the target CPU if there was a failed attempt to switch the BSP
- When looking for SMBus devices for RAM SPD retrieval, attempt to look for any disabled SMBus devices to enable before enumerating the PCI bus
- Fixed cursor appearing for some systems during testing
What new in V7.0 compared to V6.3.0
- Row Hammer Test (Test 13) now uses double-sided hammering and random data patterns in an attempt to expose more RAM modules susceptible to disturbance errors.
- PXE network boot is now fully supported (MemTest86 Site Edition only) to support scalable, diskless deployment to PXE-enabled clients. Like the Pro version, the configuration file (acquired from the PXE server via TFTP) can be used for customization and configuration of MemTest86 memory tests. Report files can also be uploaded to the server. Logging, however, is unavailable.
- Memory tests are run in Parallel CPU mode by default, if supported by the UEFI firmware. Running in parallel mode significantly decreases the test time as compared to running in single CPU mode and should also help to detect more errors faster. This was made possible after developing a work around for UEFI BIOS bug that prevented multi-threading on some machines.
- Added 'HAMMERPAT' config file parameter to specify the data pattern to use for the row hammer test. By default, random data patterns are used.
- Added 'HAMMERMODE' config file parameter to specify whether to use single or double sided hammering. By default, double-sided hammering is used.
- Added 'CPULIST' config file parameter to specify a subset of available CPUs to enable for the memory tests.
- Added 'DISABLEMP' config file parameter to disable multiprocessor support in MemTest86. This can be used as a workaround for certain UEFI firmwares that have issues running MemTest86 in multi-CPU modes.
- Added 'BGCOLOR' config file parameter to specify the background colour to use
- Added Portuguese translations
- Added Czech translations
- + 19 other fixes/enhancements (Full list of changes can be found here)
Download links
The Pro Edition can be purchased from our sales page, either as USB image files that users can install on their own USB flash drives, or an already-made USB flash drive with MemTest86 pre-installed.
The Site Edition can also be purchased from our sales page which includes all required files to install on your PXE server. The Site Edition package also contains the USB/CD Pro Edition image files should physical boot media be required.
The Free Edition can be downloaded directly from our download page:
http://www.memtest86.com/download.htm
Version History
The full 20 year release history of MemTest86 can be found here,
http://www.memtest86.com/support/ver_history.htm
Pro/Site Upgrades
If you purchased the Pro or Site Edition within 6 months of 2018/Feb/2, it is a free upgrade to V7.5 Pro/Site. Please login to your account to download the V7.5 Pro/Site package.
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