MemTest86 reports ECC not working in left-side RAM slots on ASRock x399 Taichi: bug?

[fatpigeon]

Hi, I'm observing some weird behavior in Passmark MemTest86 on my system. This may be a MemTest86 bug, firmware bug, or hardware failure (I also contacted ASRock support). Posting here in case you have any information about whether this is a MemTest86 bug.

System info:

* ASRock X399 Taichi, BIOS P3.90 (should be latest)
* AMD Threadripper 2950X
* Tried 2 different types of RAM: Crucial/Micron CT8G4WFD8266 (8 GB, dual rank, DDR4, ECC, unbuffered, 2666 MHz) and Nemix ME25600-628 (16 GB, unknown rank, DDR4, ECC, unbuffered, 3200 MHz); same behavior.

Background: I have the relevant ECC options enabled in the BIOS. If I populate a single DIMM in one of the right-side slots on the motherboard (A2, B1, or B2) (I didn't test A1 but I assume it's the same), MemTest86 consistently reports that ECC is active, and I know error correction and reporting are working because I've observed both corrected and uncorrectable errors in Linux.

Issue: If I populate a single DIMM in any of the left-side slots on the motherboard (C1, C2, D1, or D2), MemTest86 consistently reports that ECC is not supported. I diffed the logs from running the same stick in B2 (right side) and C2 (left side). (this is from version 9.0 Build 2000, but I get the same behavior in the latest version 9.1 Build 1000). Relevant-looking parts of the logs:

```
[Single stick populated in slot DDR4_B2 (right side)]
YYYY-MM-DD HH:MM:SS - UmcCap[1]=0x0000FE2C
YYYY-MM-DD HH:MM:SS - UmcCapHi[1]=0x40000000
YYYY-MM-DD HH:MM:SS - MCA_CTL_MASK_UMC[1]=0000000000000000 (DramEccErr=0)
YYYY-MM-DD HH:MM:SS - MCA_CONFIG_UMC[1]=0000000700000035
YYYY-MM-DD HH:MM:SS - MCA_CTL_UMC[1]=0000000000000000 (DramEccErr=0)
YYYY-MM-DD HH:MM:SS - Setting MCA_CTL_UMC[1][DramEccErr]=1
YYYY-MM-DD HH:MM:SS - MCA_IPID_UMC[1]=0000009600150F00 (McaType=0)
YYYY-MM-DD HH:MM:SS - MCG_CTL=0000000000008000 [Bit 16 = 0]
YYYY-MM-DD HH:MM:SS - Setting MCG_CTL to 0000000000018000
YYYY-MM-DD HH:MM:SS - ECCCTRL[1]=000004F1 (RdEccEn=1, WrEccEn=1)
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008000
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 0 CS 0): 00000000
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008000
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 0 CS 1): 00000000
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008001
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 0 CS 2): 00000020
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008003
[...]
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 7 CS 3): 00000000
YYYY-MM-DD HH:MM:SS - MCA_STATUS_UMC[1]=D42040000000011B
YYYY-MM-DD HH:MM:SS - find_mem_controller - AMD Ryzen (0h-fh) (1022:1462) at 0-24-2
YYYY-MM-DD HH:MM:SS - find_mem_controller - AMD Ryzen (0h-fh) ECC mode: detect: yes, correct: yes, scrub: no, chipkill: no
YYYY-MM-DD HH:MM:SS - ECC polling enabled
YYYY-MM-DD HH:MM:SS - AMD Ryzen chipset init
```

```
[Single stick populated in slot DDR4_C2 (left side)]
YYYY-MM-DD HH:MM:SS - UmcCap[1]=0x0000FE2C
YYYY-MM-DD HH:MM:SS - UmcCapHi[1]=0x00000000
YYYY-MM-DD HH:MM:SS - MCA_CTL_MASK_UMC[1]=0000000000000000 (DramEccErr=0)
YYYY-MM-DD HH:MM:SS - MCA_CONFIG_UMC[1]=0000000700000035
YYYY-MM-DD HH:MM:SS - MCA_CTL_UMC[1]=0000000000000000 (DramEccErr=0)
YYYY-MM-DD HH:MM:SS - Setting MCA_CTL_UMC[1][DramEccErr]=1
YYYY-MM-DD HH:MM:SS - MCA_IPID_UMC[1]=0000009600150F00 (McaType=0)
YYYY-MM-DD HH:MM:SS - MCG_CTL=0000000000008000 [Bit 16 = 0]
YYYY-MM-DD HH:MM:SS - Setting MCG_CTL to 0000000000018000
YYYY-MM-DD HH:MM:SS - ECCCTRL[1]=00000000 (RdEccEn=0, WrEccEn=0)
YYYY-MM-DD HH:MM:SS - Setting ECCCTRL[1] to 00000401
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00000000
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 0 CS 0): 00000000
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008000
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 0 CS 1): 00000000
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008001
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 0 CS 2): 00000000
YYYY-MM-DD HH:MM:SS - ECCERRCNTSEL[1]=00008003
[...]
YYYY-MM-DD HH:MM:SS - ECCERRCNT[1] (RM 7 CS 3): 00000000
YYYY-MM-DD HH:MM:SS - MCA_STATUS_UMC[1]=0000000000000000
YYYY-MM-DD HH:MM:SS - find_mem_controller - AMD Ryzen (0h-fh) (1022:1462) at 0-24-2
YYYY-MM-DD HH:MM:SS - find_mem_controller - AMD Ryzen (0h-fh) ECC mode: detect: no, correct: no, scrub: no, chipkill: no
YYYY-MM-DD HH:MM:SS - ECC polling disabled
YYYY-MM-DD HH:MM:SS - AMD Ryzen chipset init
```

(I can send the full logs if needed.)

Possibly related:

* https://forums.passmark.com/memtest8...-ecc-supported
* https://forums.passmark.com/memtest8...adripper-39xxx

[keith]

Thanks for providing the details.

It sounds like a possible MemTest86 bug.

Can you post or e-mail us a copy of the MemTest86.log.

[fatpigeon]

Thanks. I emailed the full logs (subject "Full logs for MemTest86 reports ECC not working in left-side RAM slots on ASRock x399 Taichi").

[fatpigeon]

This was resolved over email. It was in fact a bug in MemTest86 v9.1 build 1000. Passmark has fixed it in the latest version (v9.2 build 1000); thanks!